STRAINED LDMOS AND DEMOS
First Claim
1. An integrated circuit containing an extended drain metal oxide semiconductor (MOS) transistor, comprising:
- a substrate, said substrate having a first conductivity type;
a drift region of said extended drain MOS transistor, said drift region being located in said substrate, in which said drift region has a second conductivity type opposite from said first conductivity type;
stressor RESURF trenches formed in said drift region, said stressor RESURF trenches being separated by distances between 200 nanometers and 2 microns, in which said stressor RESURF trenches include;
stressor elements in said stressor RESURF trenches, so that said stressor elements have stress greater than 100 megapascals (MPa); and
at least one of;
dielectric liners in said stressor RESURF trenches contacting said drift region, so that said stressor elements are located on said dielectric liners; and
filler elements in gaps of said stressor elements.
1 Assignment
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Accused Products
Abstract
An integrated circuit on a (100) substrate containing an n-channel extended drain MOS transistor with drift region current flow oriented in the <100> direction with stressor RESURF trenches in the drift region. The stressor RESURF trenches have stressor elements with more than 100 MPa compressive stress. An integrated circuit on a (100) substrate containing an n-channel extended drain MOS transistor with drift region current flow oriented in the <110> direction with stressor RESURF trenches in the drift region. The stressor RESURF trenches have stressor elements with more than 100 MPa compressive stress. An integrated circuit on a (100) substrate containing a p-channel extended drain MOS transistor with drift region current flow oriented in a <110> direction with stressor RESURF trenches in the drift region. The stressor RESURF trenches have stressor elements with more than 100 MPa tensile stress.
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Citations
20 Claims
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1. An integrated circuit containing an extended drain metal oxide semiconductor (MOS) transistor, comprising:
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a substrate, said substrate having a first conductivity type; a drift region of said extended drain MOS transistor, said drift region being located in said substrate, in which said drift region has a second conductivity type opposite from said first conductivity type; stressor RESURF trenches formed in said drift region, said stressor RESURF trenches being separated by distances between 200 nanometers and 2 microns, in which said stressor RESURF trenches include; stressor elements in said stressor RESURF trenches, so that said stressor elements have stress greater than 100 megapascals (MPa); and at least one of; dielectric liners in said stressor RESURF trenches contacting said drift region, so that said stressor elements are located on said dielectric liners; and filler elements in gaps of said stressor elements. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. An integrated circuit containing an n-channel extended drain MOS transistor, comprising:
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a p-type silicon substrate, said substrate having a (100) orientation; an n-type drift region of said extended drain MOS transistor, said drift region being located in said substrate; stressor RESURF trenches formed in said drift region, said stressor RESURF trenches being separated by distances between 200 nanometers and 2 microns, in which said stressor RESURF trenches include; stressor elements in said stressor RESURF trenches, so that said stressor elements have compressive stress greater than 100 megapascals (MPa); and at least one of; dielectric liners in said stressor RESURF trenches contacting said drift region, so that said stressor elements are located on said dielectric liners; and filler elements in gaps of said stressor elements. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. An integrated circuit containing a p-channel extended drain MOS transistor, comprising:
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an n-type silicon substrate, said substrate having a (100) orientation; a p-type drift region of said extended drain MOS transistor, said drift region being located in said substrate, so that current flow in said drift region is oriented in a <
110>
direction;stressor RESURF trenches formed in said drift region, said stressor RESURF trenches being separated by distances between 200 nanometers and 2 microns, in which said stressor RESURF trenches include; stressor elements in said stressor RESURF trenches, so that said stressor elements have tensile stress greater than 100 megapascals (MPa); and at least one of; dielectric liners in said stressor RESURF trenches contacting said drift region, so that said stressor elements are located on said dielectric liners; and filler elements in gaps of said stressor elements. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification