Semiconductor substrate, semiconductor device, and manufacturing methods thereof

• US 20100314717A1
• Filed: 06/09/2010
• Published: 12/16/2010
• Est. Priority Date: 06/10/2009
• Status: Active Grant

• Current Assignee: Seoul Viosys Co., Ltd. (Seoul Semiconductor Co., Ltd.)
• Original Assignee: Seoul Optodevice Company Limited (Seoul Semiconductor Co., Ltd.)
• Inventors: Sakai, Shihiro
• Granted Patent: US 8,860,183 B2
• Time in Patent Office: Days
• US Class Current: 257/615
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 21/02642 Mask materials other than SiO2 or SiN
• CPC Class Codes: H01L 21/0265 Pendeoepitaxy
• CPC Class Codes: H01L 21/02664 Aftertreatments planarisation in general H01L21/304
• CPC Class Codes: H01L 33/0066 with a substrate not being a III-V compound
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0075 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/16 with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous

Abstract

The present invention provides a method of manufacturing a semiconductor substrate that includes a substrate, a first semiconductor layer arranged on the substrate, a metallic material layer arranged on the first semiconductor layer, a second semiconductor layer arranged on the first semiconductor layer and the metallic material layer, and a cavity formed in the first semiconductor layer under the metallic material layer.

Claims

1. A semiconductor substrate, comprising:

a substrate;

a first semiconductor layer arranged on the substrate;

a metallic material layer arranged on the first semiconductor layer;

a second semiconductor layer arranged on the first semiconductor layer and the metallic material layer; and

a cavity formed at a portion of the first semiconductor layer under the metallic material layer.

2. The semiconductor substrate of claim 1,.wherein the metallic semiconductor layer comprises a metallic material having a higher melting point than a heating temperature at which the second semiconductor layer is formed.

3. The semiconductor substrate of claim 1, wherein the metallic material layer comprises an oxide film.

4. The semiconductor substrate of claim 3, wherein a plurality of holes penetrates the metallic material layer.

5. The semiconductor substrate of claim 1, wherein the metallic material comprises a tantalum (Ta) layer that is at least 5 nm thick.

6. The semiconductor substrate of claim 1, wherein the metallic material comprises a titanium (Ti) layer that is at least 50 nm thick.

7. The semiconductor substrate of claim 1, wherein the metallic material layer comprises a chromium (Cr) layer that is at least 23 nm thick.

10. The semiconductor substrate of claim 1, wherein the substrate comprises a sapphire substrate or a silicon substrate.

11. The semiconductor substrate of claim 1, wherein the first semiconductor layer comprises nitrogen.

8. A semiconductor substrate, comprising:

a substrate;

a first semiconductor layer arranged on the substrate;

a second semiconductor layer arranged on the first semiconductor layer; and

a cavity formed in the first semiconductor layer.

9. The semiconductor substrate of claim 8, further comprising:

a third semiconductor layer arranged on the second semiconductor layer.

12. A method of manufacturing a semiconductor substrate, the method comprising:

forming a first semiconductor layer on a substrate;

forming a metallic material layer on the first semiconductor layer;

forming a second semiconductor layer on the first semiconductor layer and the metallic material layer; and

forming a cavity in a portion of the first semiconductor layer under the metallic material layer.

13. The method of claim 12, wherein the metallic material layer comprises a plurality of stripe-shaped portions spaced apart from each other by a constant distance, the stripe-shaped portions comprising a constant width, and the second semiconductor layer is at least 0.5 times as thick as a width of a first stripe-shaped portion of the metallic material layer.

14. The method of claim 12, wherein the metallic material layer comprises an oxide film, the oxide film forming a mask for the first semiconductor layer.

15. The method of claim 14, wherein a plurality of holes penetrates the metallic material layer.

16. The method of claim 12, wherein the second semiconductor layer is formed by metal organic chemical vapor deposition, and a portion of the first semiconductor layer, on which the metallic material layer is not formed, is grown toward the second semiconductor layer.

17. The method of claim 16, wherein the first semiconductor layer and the second semiconductor layer comprise the same semiconductor material, and the metallic semiconductor layer comprises a metallic material having a higher melting point than the heating temperature at which the second semiconductor layer is formed.

18. The method of claim 17, wherein the metallic material layer comprises a plurality of holes and an oxide film that forms a mask for the first semiconductor layer, and the plurality of holes is connected to the first semiconductor layer and the second semiconductor layer,

wherein the second semiconductor layer is formed using a metal organic chemical vapor deposition technique, and

wherein a portion of the first semiconductor layer under the metallic material layer reacts with the metallic material layer and oxygen, the portion of the first semiconductor layer is evaporated from the plurality of holes to form the cavity.

19. The method of claim 18, wherein the metallic material comprises a tantalum (Ta) layer at least 5 nm thick.

20. The method of claim 12, wherein the metallic material layer comprises Ti and is at least 50 nm thick.

21. The method according to claim 12, wherein the metallic material layer comprises Cr and is at least 23 nm thick.

30. The method of claim 12, wherein the first semiconductor layer comprises nitrogen.

31. The method of claim 12, wherein the substrate comprises a sapphire substrate or a silicon-based substrate.

32. The method of claim 12, wherein the semiconductor substrate is formed by separating the substrate from the first semiconductor layer and the second semiconductor layer using the cavity formed in the first semiconductor layer.

33. The method of claim 32, wherein a laser lift-off process is used to separate the substrate.

34. The method of claim 32, wherein a polishing process is used to separate the substrate.

22. A method of manufacturing a semiconductor substrate, the method comprising:

forming a first semiconductor layer on a substrate;

forming a metallic material layer on the first semiconductor layer;

forming a first portion of a second semiconductor layer on the first semiconductor layer and the metallic material layer;

removing the metallic material layer under the first portion of the second semiconductor layer by dipping the substrate in a solution;

forming a second portion of the second semiconductor layer on the first portion of the second semiconductor layer; and

forming a cavity in a portion of the first semiconductor layer located under where the metallic material layer was removed.

23. The method of claim 22, further comprising:

forming a third semiconductor layer on the second semiconductor layer.

24. The method of claim 22, wherein the metallic material layer is removed by ultrasound cleaning a portion of the substrate on which the second semiconductor layer is formed.

25. The method of claim 23, wherein the metallic material layer is removed by ultrasound cleaning a portion of the substrate on which the second semiconductor layer is formed.

26. The method of claim 22, wherein the solution dissolves the metallic material layer and does not dissolve the first semiconductor layer or the second semiconductor layer.

27. The method of claim 22, wherein the solution is one selected from water, water and hydrochloric acid, water and sulfuric acid, water and acetic acid, water and hydrofluoric acid, water and sodium hydroxide, and water and potassium hydroxide.

28. The method of claim 22, wherein the metallic material layer is removed by ultrasound cleaning a portion of the substrate on which the second semiconductor layer is formed, using water.

29. The method of claim 23, wherein the metallic material layer is removed by ultrasound cleaning a portion of the substrate on which the second semiconductor layer is formed, using water.

35. The method of claim 22, wherein the semiconductor substrate is formed by separating the substrate from the first semiconductor layer and the second semiconductor layer using the cavity formed in the first semiconductor layer.