ENHANCEMENTS FOR OFF-THE-SHELF 802.11 COMPONENTS

• US 20100316033A1
• Filed: 06/16/2010
• Published: 12/16/2010
• Est. Priority Date: 06/16/2009
• Status: Abandoned Application

• Current Assignee: POWERWAVE COGNITION, INC.
• Original Assignee: POWERWAVE COGNITION, INC.
• Inventors: Atwal, Peter
• Application Number:
  US12/817,114
• Publication Number:
  US 20100316033A1
• Time in Patent Office: Days
• US Class Current: 370/338
• CPC Class Codes: H04W 40/02 Communication route or path selection, e.g. power-based or shortest path routing
• CPC Class Codes: H04W 74/002 Transmission of channel access control information
• CPC Class Codes: H04W 74/0833 Random access procedures, e.g. with 4-step access

Abstract

Methods and systems are disclosed for deploying mobile ad hoc networks using commercial off-the-shelf components conforming to the IEEE 802.11-2007 networking standard. In particular, a physical layer (which may be implemented in hardware, software, or a combination of these) is provided at or below the MAC layer that adapts operation of standard chipsets to an enhanced ad hoc wireless networking protocol such as the MBRI protocol described herein. This may include suppressing or disabling certain operations of the 802.11 chipset, and adding other functions to support augmenting functionality of the protocol stack to provide various higher-level network functions (e.g., network, routing, and other functions) of an enhanced protocol within or through the physical layer. In one aspect, there is disclosed herein a method for operating a network device that includes disabling at least one function of an 802.11 chipset and providing at least one additional network function through a physical layer application programming interface for the 802.11 chipset.

Claims

1. A method for wireless communication comprising:

providing a chipset including one or more 802.11-compliant chips;

configuring the chipset to disable CSMA/CS processing;

configuring the chipset into slotted TDMA mode; and

transceiving data through an API configured to extend operation of the chipset to an enhanced protocol for a wireless ad hoc network including;

passing a packet between a PHY layer of the chipset and a MAC layer of the enhanced protocol using at least a timeslot;

exchanging at least an RSSI parameter and a timeslot number parameter for the packet; and

providing a timing signal for transmission over an air interface by the chipset.

2. The method of claim 1 further comprising:

disabling ACK/NAK handling of the chipset; and

disabling RTS/CTS handling by the chipset.

3. The method of claim 1 further comprising disabling DIFS processing by the chipset.

4. The method of claim 1 wherein transceiving data through the API further comprises exchanging a SNR parameter for the packet.

5. The method of claim 1 further comprising transceiving a plurality of packets through the API, each one of the packets having a header, and each one of the headers converted by the API between a format for the chipset and a format for the enhanced protocol.

6. The method of claim 5 wherein transceiving the plurality of packets includes adding at least one of the RSSI parameter and an SNR parameter to the header of each one of the plurality of packets received by the MAC layer of the enhanced protocol from the PHY layer of the chipset.

7. The method of claim 5 wherein transceiving the plurality of packets includes removing at least one of the RSSI parameter and an SNR parameter from the header of each one of the plurality of packets received by the PHY layer of the chipset from the MAC layer of the enhanced protocol.

8. A computer program product for communicating in a wireless ad hoc network, the computer program product embodied in a non-transitory computer readable medium that, when executing on one or more computing devices, performs the steps of:

configuring a chipset that includes one or more 802.11-compliant chips to disable CSMA/CS processing;

configuring the chipset into slotted TDMA mode; and

transceiving data through an API configured to extend operation of the chipset to an enhanced protocol for the wireless ad hoc network including;

passing a packet between a PHY layer of the chipset and a MAC layer of the enhanced protocol using at least a timeslot;

exchanging at least an RSSI parameter and a timeslot number parameter for the packet; and

providing a timing signal for transmission over an air interface by the chipset.

9. The computer program product of claim 8 further comprising code that performs the steps of:

disabling ACK/NAK handling of the chipset; and

disabling RTS/CTS handling by the chipset.

10. The computer program product of claim 8 further comprising code that performs the step of disabling DIFS processing by the chipset.

11. The computer program product of claim 8 wherein transceiving data through the API further comprises exchanging a SNR parameter for the packet.

12. The computer program product of claim 8 further comprising code that performs the step of transceiving a plurality of packets through the API, each one of the packets having a header, and each one of the headers converted by the API between a format for the chipset and a format for the enhanced protocol.

13. The computer program product of claim 12 wherein transceiving the plurality of packets includes adding at least one of the RSSI parameter and an SNR parameter to the header of each one of the plurality of packets received by the MAC layer of the enhanced protocol from the PHY layer of the chipset.

14. The computer program product of claim 12 wherein transceiving the plurality of packets includes removing at least one of the RSSI parameter and an SNR parameter from the header of each one of the plurality of packets received by the PHY layer of the chipset from the MAC layer of the enhanced protocol.

15. A device for wireless communication comprising:

a chipset including one or more 802.11-compliant chips, the chipset configured to disable CSMA/CS processing and the chipset configured into slotted TDMA mode; and

a processor configured to provide an API that extends operation of the chipset to an enhanced protocol for a wireless ad hoc network, the API operable to;

pass a packet between a PHY layer of the chipset and a MAC layer of the enhanced protocol using at least a timeslot;

exchange at least an RSSI parameter and a timeslot number parameter for the packet; and

provide a timing signal for transmission over an air interface by the chipset.

16. The device of claim 15 wherein the chipset is further configured to disable ACK/NAK handling and to disable RTS/CTS handling.

17. The device of claim 15 wherein the chipset is further configured to disable DIFS processing.

18. The device of claim 15 wherein the API is operable to exchange a SNR parameter for the packet.

19. The device of claim 15 wherein the API is operable to transceive a plurality of packets, each one of the packets having a header, and each one of the headers converted by the API between a format for the chipset and a format for the enhanced protocol.

20. The device of claim 19 wherein the API is operable to add at least one of the RSSI parameter and an SNR parameter to the header of each one of the plurality of packets received by the MAC layer of the enhanced protocol from the PHY layer of the chipset.

21. The device of claim 19 wherein the API is operable to remove at least one of the RSSI parameter and an SNR parameter from the header of each one of the plurality of packets received by the PHY layer of the chipset from the MAC layer of the enhanced protocol.