REMOTE PLASMA PROCESSING OF INTERFACE SURFACES

• US 20100317178A1
• Filed: 06/12/2009
• Published: 12/16/2010
• Est. Priority Date: 06/12/2009
• Status: Active Grant

• Current Assignee: Novellus Systems Incorporated (LAM Research Corporation)
• Original Assignee: Novellus Systems Incorporated (LAM Research Corporation)
• Inventors: O' Loughlin, Jennifer, Schravendijk, Bart Van, Varadarajan, Seshasayee, Sriram, Mandyam, Antonelli, George Andrew, Buckalew, Bryan L., Rangarajan, Vishwanathan, Xavier, Tony
• Granted Patent: US 8,084,339 B2
• Time in Patent Office: Days
• US Class Current: 438/584
• CPC Class Codes: C23C 16/0245 by etching with a plasma
• CPC Class Codes: C23C 16/54 Apparatus specially adapted for continuous coating
• CPC Class Codes: C23C 16/56 After-treatment
• CPC Class Codes: H01L 21/0206 during, before or after processing of insulating layers
• CPC Class Codes: H01L 21/02068 during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
• CPC Class Codes: H01L 21/02074 the processing being a planarization of conductive layers
• CPC Class Codes: H01L 21/02315 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/3105 After-treatment
• CPC Class Codes: H01L 21/67201 characterized by the construction of the load-lock chamber
• CPC Class Codes: H01L 21/76826 by contacting the layer with gases, liquids or plasmas
• CPC Class Codes: H01L 21/76862 Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation
• CPC Class Codes: H01L 21/76883 Post-treatment or after-treatment of the conductive material
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Embodiments related to the cleaning of interface surfaces in a semiconductor wafer fabrication process via remote plasma processing are disclosed herein. For example, in one disclosed embodiment, a semiconductor processing apparatus comprises a processing chamber, a load lock coupled to the processing chamber via a transfer port, a wafer pedestal disposed in the load lock and configured to support a wafer in the load lock, a remote plasma source configured to provide a remote plasma to the load lock, and an ion filter disposed between the remote plasma source and the wafer pedestal.

Claims

1. A semiconductor processing apparatus, comprising:

a processing chamber;

a load lock coupled to the processing chamber via a transfer port;

a wafer pedestal disposed in the load lock and configured to support a wafer in the load lock;

a remote plasma source configured to provide a remote plasma to the load lock; and

an ion filter configured to filter ions from the remote plasma.

2. The semiconductor processing apparatus of claim 1, wherein the processing chamber is a PECVD processing chamber, and wherein the load lock is an inbound load lock.

3. The semiconductor processing apparatus of claim 2, wherein the PECVD processing chamber is configured to deposit an etch stop film.

4. The semiconductor processing apparatus of claim 2, wherein the PECVD processing chamber is configured to deposit an ashable hard mask film.

5. The semiconductor processing apparatus of claim 1, wherein the remote plasma source comprises an outlet configured to direct a flow of remote plasma in a direction normal to a wafer-supporting surface of the wafer pedestal.

6. The semiconductor processing apparatus of claim 5, wherein the remote plasma source outlet has a diameter equal to or larger than a diameter of a wafer for which the load lock is configured for use.

7. The semiconductor processing apparatus of claim 1, further comprising a wafer heater configured to heat a wafer positioned on the wafer pedestal.

8. The semiconductor processing apparatus of claim 1, wherein the ion filter comprises a plate disposed across an outlet of the remote plasma source, the plate comprising a plurality of openings.

9. The semiconductor processing apparatus of claim 8, wherein each opening in the plate comprises a length to diameter ratio of 3 or more.

10. The semiconductor processing apparatus of claim 1, wherein the ion filter comprises one or more of a charged mesh, a charged wall, and an electron source.

11. The semiconductor processing apparatus of claim 1, wherein the load lock is an outbound load lock.

12. The semiconductor processing apparatus of claim 11, wherein the processing chamber is a low-k dielectric material deposition chamber.

13. The semiconductor processing chamber of claim 1, wherein the processing chamber is a plating chamber, and wherein the load lock is an inbound load lock.

14. A load lock for a semiconductor processing apparatus, the load lock comprising:

an atmospheric transfer port and a chamber transfer port;

a wafer pedestal disposed in an interior of the load lock and configured to support a wafer in the load lock;

a remote plasma source coupled to the load lock, the remote plasma source comprising an outlet configured to direct a flow of a remote plasma in a direction normal to the wafer supporting surface of the wafer pedestal; and

an ion filter configured to remove ions from remote plasma flowing from the remote plasma source toward the heated wafer pedestal.

15. The load lock of claim 14, wherein the outlet of the remote plasma source comprises a diameter equal to or greater than a diameter of a wafer for which the load lock is intended for use.

16. The load lock of claim 14, wherein the ion filter comprises a plate disposed across an outlet of the remote plasma source, the plate comprising a plurality of openings each having a length to diameter ratio of 3 or greater.

17. The load lock of claim 14, wherein the ion filter comprises one or more of a charged conductive mesh, a charged wall, and an electron source.

18. The load lock of claim 14, wherein the remote plasma source comprises an inductively coupled plasma source.

19. In a semiconductor processing apparatus, a method of forming an etch stop layer over a wafer with a surface comprising a metal region and a dielectric material region, the method comprising:

inserting the wafer into an inbound load lock that is coupled to a plasma enhanced chemical vapor deposition chamber;

heating the wafer in the load lock;

flowing a remote plasma over the surface of the wafer while the wafer is in the load lock;

transferring the wafer from the load lock into the plasma enhanced chemical vapor deposition chamber; and

forming an etch stop layer over the surface of the wafer.

20. The method of claim 19, wherein flowing the remote plasma over the polished surface of the wafer comprises reducing a metal oxide on the metal portion of the polished surface.

21. The method of claim 19, wherein flowing the remote plasma over the polished surface of the wafer comprises introducing a flow of the remote plasma over the wafer in a flow direction substantially normal to the polished surface of the wafer.

22. The method of claim 21, wherein flowing the remote plasma over the surface of the wafer in the flow direction substantially normal to the surface of the wafer comprises introducing the remote plasma flow via a remote plasma source with an outlet diameter equal to or greater than a diameter of the wafer.

23. The method of claim 19, further comprising flowing the remote plasma through an ion filter comprising a plate with a plurality of through-holes each having a length to diameter ratio of three or more.

24. The method of claim 19, wherein the remote plasma comprises one or more of a reducing gas and an oxidizing gas, and wherein flowing the remote plasma over the surface of the wafer comprises one or more of reducing metal oxides and oxidizing carbon residues on the surface of the wafer.

25. In a semiconductor processing apparatus, a method of forming an interface between two layers of different material compositions, the method comprising:

forming a layer of a first material composition on a substrate;

positioning the substrate in a remote plasma processing apparatus;

generating a remote plasma and filtering ions from the remote plasma;

flowing the remote plasma over a surface of the layer of the first material composition; and

forming a layer of the second material composition on the surface of the layer of the first material composition to thereby form the interface between the two layers of different material compositions.

26. The method of claim 25, wherein the layer of the first material composition comprises a metal region and a dielectric region, wherein the layer of the second material composition comprises a layer of an etch stop material, and wherein forming the layer of the second material composition comprises forming the layer of the second material composition by plasma enhanced chemical vapor deposition.

27. The method of claim 26, further comprising forming the surface of the first material via chemical mechanical polishing before flowing the remote plasma over the surface of the first material.

28. The method of claim 25, wherein positioning the substrate in a remote plasma processing apparatus comprises positioning the substrate in an inbound load lock for a plasma enhanced CVD system.

29. The method of claim 25, wherein the layer of the first material composition comprises tungsten, and wherein the layer of the second material composition comprises a hard mask layer.

30. The method of claim 25, wherein flowing the remote plasma over a surface of the first material composition, in a direction normal to the surface of the layer of the first material comprises introducing the remote plasma flow via a remote plasma source with an outlet diameter equal to or greater than a diameter of the wafer.

31. The method of claim 25, wherein the remote plasma processing apparatus comprises a load lock coupled to a remote plasma source.

32. The method of claim 25, wherein the remote plasma processing apparatus comprises a processing station in a multi-station processing tool.

33. The method of claim 25, wherein the layer of the first material composition comprises a low-k dielectric material, and wherein positioning the substrate in a remote plasma processing apparatus comprises positioning the substrate in an outbound load lock coupled to a low-k dielectric material deposition chamber.

34. The method of claim 25, further comprising exposing the substrate to ultraviolet light while the substrate is positioned in the remote plasma processing apparatus.