SYSTEM AND METHOD FOR MANAGING PROCESSOR-IN-MEMORY (PIM) OPERATIONS

• US 20100318764A1
• Filed: 06/12/2009
• Published: 12/16/2010
• Est. Priority Date: 06/12/2009
• Status: Active Grant

• Current Assignee: CRAY Incorporated (Hewlett-Packard Enterprise Company)
• Original Assignee: CRAY Incorporated (Hewlett-Packard Enterprise Company)
• Inventors: Greyzck, Terry D.
• Granted Patent: US 8,583,898 B2
• Time in Patent Office: Days
• US Class Current: 712/7
• CPC Class Codes: G06F 9/30029 Logical and Boolean instructions, e.g. XOR, NOT
• CPC Class Codes: G06F 9/30036 Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
• CPC Class Codes: G06F 9/3004 to perform operations on memory
• CPC Class Codes: G06F 9/30087 Synchronisation or serialisation instructions
• CPC Class Codes: G06F 9/345 of multiple operands or results addressing multiple banks G06F12/06
• CPC Class Codes: G06F 9/3455 using stride

Abstract

A system and method of compiling program code, wherein the program code includes an operation on an array of data elements stored in memory of a computer system. The program code is scanned for operations that are vectorizable. The vectorizable operations are examined to determine whether they should be executed at least in part in a vector atomic memory operation (AMO) functional unit attached to memory. If so, the compiled code includes vector AMO instructions.

Claims

1. In a vector computer system having a plurality of processors connected to memory, wherein the memory includes one or more vector atomic memory operation (AMO) functional units and the processors include one or more vector functional units, a method of vectorizing an iterative loop, the method comprising:

scanning program code, wherein scanning includes determining whether an operation is vectorizable;

if an operation is vectorizable, determining whether the operation should be executed using a vector AMO instruction in one of the vector AMO functional units;

if an operation is vectorizable and the operation should be executed using a vector AMO instruction in one of the vector AMO functional units, implement at least a portion of the operation as a vector AMO instruction; and

if an operation is vectorizable and the operation should not be executed using a vector AMO instruction in one of the vector AMO functional units, implement at least a portion of the operation to execute in one or more vector functional units of one or more processors.

2. The method of claim 1, wherein determining whether the operation should be executed using a vector AMO instruction in one of the vector AMO functional units is a function of memory transfer overhead.

3. The method of claim 1, wherein determining whether the operation should be executed using a vector AMO instruction in one of the vector AMO functional units is a function of computational speed difference between one or more of the vector functional units and one or more of the vector AMO functional units.

4. The method of claim 1, wherein the program code includes an array having an additional dimension depicting processor number and wherein determining whether the operation should be executed using a vector AMO instruction in one of the vector AMO functional units is a function of processor number.

5. The method of claim 1, wherein the vector atomic memory operation is performed in a memory controller.

6. An article comprising a computer readable medium having instructions thereon, wherein the instructions, when executed in a computer, create a system for executing the method of claim 1.

7. In a vector computer system having a plurality of processors connected to memory, wherein the memory includes one or more vector atomic memory operation (AMO) functional units and the processors include one or more vector functional units, a computer implemented method of compiling program code, the method comprising:

a) scanning the program code for an operation that is vectorizable;

b) determining whether some portion of the vectorizable equation should be executed in the vector AMO functional unit; and

c) replacing the equation with vectorized machine executable code;

wherein, if a determination was made that some portion of the vectorizable equation should be executed in the vector AMO functional unit, the vectorized machine executable code includes vectorization code for performing a mathematical operation using one or more vector atomic memory operations; and

wherein, if a determination was made that some portion of the vectorizable equation should be not executed in the vector AMO functional unit, the vectorized machine executable code includes vectorization code for performing vector operations without using the vector AMO functional unit.

8. The method of claim 7, wherein the vector atomic memory operation is performed in a memory controller.

9. The method of claim 7, determining whether some portion of the vectorizable equation should be executed in the vector AMO functional unit includes determining whether an operation has recurring data points.

10. The method of claim 7, wherein determining whether some portion of the vectorizable equation should be executed in the vector AMO functional unit is a function of memory transfer overhead.

11. The method of claim 7, wherein determining whether some portion of the vectorizable equation should be executed in the vector AMO functional unit is a function of computational speed difference between one or more of the vector functional units and one or more of the vector AMO functional units.

12. The method of claim 7, wherein the program code includes an array having an additional dimension depicting processor number and wherein determining whether some portion of the vectorizable equation should be executed in the vector AMO functional unit is a function of processor number.

13. An article comprising a computer readable medium having instructions thereon, wherein the instructions, when executed in a computer, create a system for executing the method of claim 7.