THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME

• US 20100320468A1
• Filed: 06/16/2010
• Published: 12/23/2010
• Est. Priority Date: 06/19/2009
• Status: Active Grant

• Current Assignee: Panasonic Intellectual Property Corporation of America (Panasonic Holdings Corporation)
• Original Assignee: IPS Alpha Technology Limited (Panasonic Holdings Corporation)
• Inventors: WATANABE, Kunihiko, KAMATA, Yuuki, NISHIMURA, Yuuichi
• Granted Patent: US 8,395,154 B2
• Time in Patent Office: Days
• US Class Current: 257/59
• CPC Class Codes: G03F 7/70633 Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
• CPC Class Codes: G03F 9/708 Mark formation
• CPC Class Codes: G03F 9/7084 Position of mark on substrate, i.e. position in (x, y, z) of mark, e.g. buried or resist covered mark, mark on rearside, at the substrate edge, in the circuit area, latent image mark, marks in plural levels
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52

Abstract

In a portion of a gate signal line and a portion of a common signal line, cutouts which are arranged perpendicular to the extending direction of these lines and open to face each other in an opposed manner are formed. A cruciform shape in appearance is formed by combining a gap defined between the gate signal line and the common signal line extending parallel to each other and the cutouts to each other. The cruciform portion formed in this manner is used as an alignment mark in the exposure of a photolithography step of a layer formed later. Due to such a constitution, in manufacturing a thin film transistor substrate, it is possible to realize the highly accurate alignment without forming a pattern only used for alignment.

Claims

1. A thin film transistor substrate which controls a display of a display device, comprising,

a first metal line to which a voltage is applied by a driver circuit,

wherein the first metal line includes a first shape as a portion of alignment mark.

2. The thin film transistor substrate according to claim 1, wherein the first metal line is formed of a gate line of a transistor.

3. The thin film transistor substrate according to claim 1, wherein the first shape is formed by a cutout.

5. The thin film transistor substrate according to claim 1, wherein the first shape is formed by a projecting portion projecting in the direction perpendicular to an extending direction of the first metal line.

6. The thin film transistor substrate according to claim 1, further comprising,

a second metal line which is parallel to an extending direction of the first metal line,

wherein the second metal line includes the first shape as a part of the alignment mark as well as the first metal line.

7. The thin film transistor substrate according to claim 6, wherein, in both of the first metal line and the second metal line which extend parallel to each other, the first shape is formed by cutouts which are arranged perpendicular to the extending direction and are opened in an opposed manner.

8. The thin film transistor substrate according to claim 6, wherein, in both of the first metal line and the second metal line which extend parallel to each other, the first shape is formed by projecting portions projecting in the direction perpendicular to the extending direction.

9. The thin film transistor substrate according to claim 1, further comprising,

a pattern which is electrically independent from the first metal line and to which a voltage is not applied, and the pattern forms the alignment mark together with the first shape.

10. The thin film transistor substrate according to claim 1, further comprising,

a metal electrode or a second metal line which differs from the first metal line,

wherein the metal electrode or the second metal line has a second shape, and the second shape forms the alignment mark together with the first shape.

11. The thin film transistor substrate according to claim 10, wherein the metal electrode or the second metal line is formed of a source/drain line.

4. The thin film transistor substrate according to claim wherein the cutout has a cruciform shape.

12. A method of manufacturing a thin film transistor substrate which controls a display of a display device, the method comprising:

forming a first metal line which has a first shape in at least a part thereof, and

performing alignment and exposure using the first shape as a portion of an alignment mark.

13. A method of manufacturing a thin film transistor substrate according to claim 12, further comprising,

forming a metal electrode or a second metal line which has a second shape after the forming the first metal line which has the first shape,

wherein the performing alignment is performed by using the second shape as the alignment mark together with the first shape.

14. A method of manufacturing a thin film transistor substrate according to claim 13, wherein the performing alignment is performed by using the center of a displaced distance as an alignment position when a position of the first shape and a position of the second shape are displaced from a correct position.