Method for Forming MEMS Devices Having Low Contact Resistance and Devices Obtained Thereof
First Claim
1. A MEMS device comprising a silicon-germanium (SiGe) layer formed over a dielectric stack which is formed over a an another layer, the dielectric layer stack comprising an opening exposing the conductive layer, whereby an interface layer separates the SiGe layer from the dielectric layer stack at least in the opening and from the exposed another layer in the opening.
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Abstract
The present disclosure proposes a method for manufacturing in a MEMS device a low-resistance contact between a silicon-germanium layer and a layer contacted by this silicon-germanium layer, such as a CMOS metal layer or another silicon-germanium layer, through an opening in a dielectric layer stack separating both layers. An interlayer is formed in this opening, thereby covering at least the sidewalls of the opening on the exposed surface of the another layer at the bottom of this opening. This interlayer may comprise a TiN layer in contact with the silicon-germanium layer. This interlayer can further comprise a Ti layer in between the TiN layer and the layer to be contacted. In another embodiment this interlayer comprises a TaN layer in contact with the silicon-germanium layer. This interlayer can then further comprise a Ta layer in between the TaN layer and the layer to be contacted.
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Citations
20 Claims
- 1. A MEMS device comprising a silicon-germanium (SiGe) layer formed over a dielectric stack which is formed over a an another layer, the dielectric layer stack comprising an opening exposing the conductive layer, whereby an interface layer separates the SiGe layer from the dielectric layer stack at least in the opening and from the exposed another layer in the opening.
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10. A method for manufacturing a MEMS device comprising:
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forming an opening in a dielectric stack to expose at least a portion of an another layer below the dielectric stack; forming an interface layer at least on the sidewalls of the opening and on the exposed surface of the another layer, and forming a silicon-germanium (SiGe) layer at least in a portion of the opening, whereby the interface layer separates the SiGe layer from the dielectric layer stack at least in the opening and from the exposed another layer. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification