DEVICE OF FLASH MODULES ARRAY

• US 20100325348A1
• Filed: 01/18/2008
• Published: 12/23/2010
• Est. Priority Date: 12/05/2007
• Status: Abandoned Application

• Current Assignee: Suzhou One World Technology Co., Ltd.
• Original Assignee: Suzhou One World Technology Co., Ltd.
• Inventors: Hu, Ying, Willmann, Paul, Rafizadeh, Schumann, Lin, Yiji
• Application Number:
  US12/746,719
• Publication Number:
  US 20100325348A1
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0631 by allocating resources to storage systems
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

This invention provides a device of Flash Modules Array or Flash Array (FA) for short, with a higher capacity, higher speed and lower power consumption. A device of flash array comprises: a one or more physical I/O interfaces, for performing data transmission with the outside or upstream; one or more ports for flash modules consisting of multiple flash memory modules, a flash array controller, set between the physical I/O interface and the flash modules, further including: a block mapping unit, for performing the address mapping between the logical address which is transmitted between the physical I/O interface and the outside and the physical address which is transmitted between the physical I/O interface and the flash array. The invention is applied in the field of flexible solid state storage device.

Claims

1. A device of flash array comprising:

one or more physical I/O interfaces, for performing data transmission with the outside or upstream;

one or more ports for flash modules consisting of multiple flash memory modules;

a flash array controller, set between the physical I/O interface and the flash modules;

Further including;

a block mapping unit, for performing the address mapping between the logical address and the physical address.

2. The device of flash array of claim 1 wherein the flash memory modules are parallel.

3. The device of flash array of claim 2 wherein the physical I/O interface includes one of USB interface, SATA interface, eSATA interface, and ATA interface.

4. The device of flash array of claim 1 further comprising the printed circuit board accommodated with the flash array controller.

5. The device of flash array of claim 1 further comprising an enclosure.

6. The device of flash array of claim 2 wherein the block mapping unit maps address by treating the parallel flash memory modules as separate arrays of linearly addressable blocks.

7. The device of flash array of claim 2 wherein the block mapping unit maps address by simultaneously accessing parallel flash memory modules.