Storage device, storage control device, data transfer intergrated circuit, and storage control method
First Claim
1. A storage device comprising:
- a data transfer unit that stores to-be-transferred data into a nonvolatile memory, when an abnormal end occurs, the to-be-transferred data including to-be-saved data stored in a cache memory and parity data for correcting a data error in the to-be-saved data, with an error detection code for detecting a data error being added to the to-be-saved data and the parity data;
a data reading unit that reads stripes from the nonvolatile memory when power is supplied to the storage device after an abnormal end, the stripes being formed by dividing the to-be-transferred data by a predetermined stripe size;
an additional data adding unit that adds additional data to a stripe until a size of the stripe becomes equal to the stripe size, when the data reading unit does not finish reading the stripe within a predetermined period of time;
a data error checking unit that determines whether a data error exists in the stripes, based on the error detection code added to the stripes read out by the data reading unit;
a data correcting unit that corrects a data error, using the stripes read out by the data reading unit, when the data error checking unit detects the data error; and
a data writing unit that writes into the cache memory to-be-saved data contained in stripes not having a data error detected by the data error checking unit, and writes into the cache memory to-be-saved data contained in stripes having a data error corrected by the data correcting unit.
1 Assignment
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Accused Products
Abstract
A storage device is for restoring the data saved in a nonvolatile memory to a cache memory, even if there is not a read response from the nonvolatile memory. In a data saving operation, parity data of to-be-saved data is generated, and the to-be-saved data and the parity data having CRCs and AIDs added thereto are written into a flash memory. In a data restoring operation, if an operation to read data from the flash memory is not completed within a predetermined period of time, the data reading operation is suspended, and additional data is set. The to-be-saved data having a data error corrected with the parity data is then written into the cache memory.
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Citations
12 Claims
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1. A storage device comprising:
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a data transfer unit that stores to-be-transferred data into a nonvolatile memory, when an abnormal end occurs, the to-be-transferred data including to-be-saved data stored in a cache memory and parity data for correcting a data error in the to-be-saved data, with an error detection code for detecting a data error being added to the to-be-saved data and the parity data; a data reading unit that reads stripes from the nonvolatile memory when power is supplied to the storage device after an abnormal end, the stripes being formed by dividing the to-be-transferred data by a predetermined stripe size; an additional data adding unit that adds additional data to a stripe until a size of the stripe becomes equal to the stripe size, when the data reading unit does not finish reading the stripe within a predetermined period of time; a data error checking unit that determines whether a data error exists in the stripes, based on the error detection code added to the stripes read out by the data reading unit; a data correcting unit that corrects a data error, using the stripes read out by the data reading unit, when the data error checking unit detects the data error; and a data writing unit that writes into the cache memory to-be-saved data contained in stripes not having a data error detected by the data error checking unit, and writes into the cache memory to-be-saved data contained in stripes having a data error corrected by the data correcting unit. - View Dependent Claims (2, 3, 4, 5)
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6. A data transfer integrated circuit for storing to-be-transferred data into a nonvolatile memory, the to-be-transferred data including to-be-saved data stored in a cache memory and parity data for correcting a data error in the to-be-saved data, with an error detection code for detecting a data error being added to the to-be-saved data and the parity data,
the data transfer integrated circuit comprising: -
a data reading unit that reads stripes from the nonvolatile memory, the stripes being formed by dividing the to-be-transferred data by a predetermined stripe size; an additional data adding unit that adds additional data to a stripe until a size of the stripe becomes equal to the stripe size, when the data reading unit does not finish reading the stripe within a predetermined period of time; a data error checking unit that determines whether a data error exists in the stripes, based on the error detection code added to the stripes read out by the data reading unit; a data correcting unit that corrects a data error, using the stripes read out by the data reading unit, when the data error checking unit detects the data error; and a data writing unit that writes into the cache memory to-be-saved data contained in stripes not having a data error detected by the data error checking unit, and writes into cache memory to-be-saved data contained in stripes having a data error corrected by the data correcting unit. - View Dependent Claims (7)
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8. A storage control method for controlling a storage device including a data transfer unit that stores to-be-transferred data into a nonvolatile memory when an abnormal end occurs, the to-be-transferred data including to-be-saved data stored in a cache memory and parity data for correcting a data error in the to-be-saved data, with an error detection code for detecting a data error being added to the to-be-saved data and the parity data,
the storage control method comprising: -
reading stripes from the nonvolatile memory when power is supplied after an abnormal end, the stripes being formed by dividing the to-be-transferred data by a predetermined stripe size; adding additional data to a stripe until a size of the stripe becomes equal to the stripe size, when the stripe is not read within a predetermined period of time at the reading; determining whether a data error exists in the stripes, based on the error detection code added to the stripes read out at the reading; correcting a data error, using the stripes read out at the reading, when the data error is determined at the determining; and writing into the cache memory to-be-saved data contained in stripes not having a data error determined at the determining, and writing into the cache memory to-be-saved data contained in stripes having a data error corrected at the correcting. - View Dependent Claims (9, 10, 11, 12)
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Specification