SEMICONDUCTOR DEVICE
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Accused Products
Abstract
A semiconductor device includes a semiconductor substrate and a MOS transistor. The semiconductor substrate has the first main surface and the second main surface facing each other. The MOS transistor includes a gate electrode (5a) formed on the first main surface side, an emitter electrode (11) formed on the first main surface side, and a collector electrode (12) formed in contact with the second main surface. An element generates an electric field in a channel by a voltage applied to the gate electrode (5a), and controls the current between the emitter electrode (11) and the collector electrode (12) by the electric field in the channel. The spike density in the interface between the semiconductor substrate and the collector electrode (12) is not less than 0 and not more than 3×108 unit/cm2. Consequently, a semiconductor device suitable for parallel operation is provided.
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Citations
75 Claims
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1-5. -5. (canceled)
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6. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; and a collector region formed on said second main surface, said collector region including a collector diffusion layer of a first conductivity type in contact with said second electrode, and a buffer diffusion layer of a second conductivity type formed closer to the first main surface than said collector diffusion layer is, wherein an impurity concentration of said collector diffusion layer in an interface between said second electrode and said collector diffusion layer is not less than 5.0×
1015 cm−
3 and not more than 1.0×
1022 cm−
3.
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7. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; and a collector region formed on said second main surface, said collector region including a collector diffusion layer of a first conductivity type in contact with said second electrode, and a buffer diffusion layer of a second conductivity type formed closer to the first main surface than said collector diffusion layer is, wherein a maximum value of an impurity concentration of said collector diffusion layer is not less than 1.0×
1016 cm−
3 and not more than 1.0×
1022 cm−
3.
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8. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; and a collector region formed on said second main surface, said collector region including a collector diffusion layer of a first conductivity type in contact with said second electrode, and a buffer diffusion layer of a second conductivity type formed closer to the first main surface than said collector diffusion layer is, wherein a depth from said second main surface to a junction plane between said collector diffusion layer and said buffer diffusion layer is greater than 0 and not more than 1.0 μ
m.
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9. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; and a collector region formed on said second main surface, said collector region including a collector diffusion layer of a first conductivity type in contact with said second electrode, and a buffer diffusion layer of a second conductivity type formed closer to the first main surface than said collector diffusion layer is, wherein said collector region further includes a drift diffusion layer of the second conductivity type, and said drift diffusion layer is lower in impurity concentration than said buffer diffusion layer and formed adjacent to said buffer diffusion layer and closer to the first main surface than said buffer diffusion layer is, and a depth from said second main surface to a junction plane between said buffer diffusion layer and said drift diffusion layer is not less than 0.4 μ
m and not more than 50 μ
m.
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10. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; and a collector region formed on said second main surface, said collector region including a collector diffusion layer of a first conductivity type in contact with said second electrode, and a buffer diffusion layer of a second conductivity type formed closer to the first main surface than said collector diffusion layer is, wherein a carrier lifetime in said buffer diffusion layer is less than a carrier lifetime in said collector diffusion layer.
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11. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; and a collector region formed on said second main surface, said collector region including a collector diffusion layer of a first conductivity type in contact with said second electrode, and a buffer diffusion layer of a second conductivity type formed closer to the first main surface than said collector diffusion layer is, wherein said collector region further includes a drift diffusion layer of the second conductivity type, and said drift diffusion layer is lower in impurity concentration than said buffer diffusion layer and formed adjacent to said buffer diffusion layer and closer to the first main surface than said buffer diffusion layer is, and a carrier lifetime in a range of a depth of not less than 0.50 μ
m and not more than 60.0 μ
m from said second main surface is less than a carrier lifetime in said drift diffusion layer.
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12. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; and a collector region formed on said second main surface, said collector region including a collector diffusion layer of a first conductivity type in contact with said second electrode, and a buffer diffusion layer of a second conductivity type formed closer to the first main surface than said collector diffusion layer is, wherein said collector diffusion layer is lower in activation rate than said buffer diffusion layer.
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13. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; and a collector region formed on said second main surface, said collector region including a collector diffusion layer of a first conductivity type in contact with said second electrode, and a buffer diffusion layer of a second conductivity type formed closer to the first main surface than said collector diffusion layer is, wherein an activation rate in said collector diffusion layer is greater than 0 and not more than 90%.
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14. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; and a collector region formed on said second main surface, said collector region including a collector diffusion layer of a first conductivity type in contact with said second electrode, and a buffer diffusion layer of a second conductivity type formed closer to the first main surface than said collector diffusion layer is, wherein a depth from said second main surface to a position where an impurity concentration of said buffer diffusion layer reaches a maximum value is not less than 0.40 μ
m and not more than 50 μ
m.
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15. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; and a collector region formed on said second main surface, said collector region including a collector diffusion layer of a first conductivity type in contact with said second electrode, and a buffer diffusion layer of a second conductivity type formed closer to the first main surface than said collector diffusion layer is, wherein a ratio of a maximum value of an impurity concentration in said collector diffusion layer to a maximum value of an impurity concentration in said buffer diffusion layer is not less than 1.0 and not more than 1.0×
103.
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16. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; and a collector region formed on said second main surface, said collector region including a collector diffusion layer of a first conductivity type in contact with said second electrode, and a buffer diffusion layer of a second conductivity type formed closer to the first main surface than said collector diffusion layer is, wherein said collector region further includes a drift diffusion layer of the second conductivity type, and said drift diffusion layer is lower in impurity concentration than said buffer diffusion layer and formed adjacent to said buffer diffusion layer and closer to the first main surface than said buffer diffusion layer is, and a ratio of the number of atoms per unit area of impurities forming said buffer diffusion layer to the number of atoms per unit area of impurities forming said drift diffusion layer is not less than 0.05 and not more than 100.
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17. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; and a collector region formed on said second main surface, said collector region including a collector diffusion layer of a first conductivity type in contact with said second electrode, and a buffer diffusion layer of a second conductivity type formed closer to the first main surface than said collector diffusion layer is, wherein said collector region further includes an intermediate layer of the second conductivity type, and said intermediate layer is lower in impurity concentration than said buffer diffusion layer and formed adjacent to said buffer diffusion layer, and a ratio of the number of atoms per unit area of impurities forming said intermediate layer to the number of atoms per unit area of impurities forming said buffer diffusion layer is greater than 0 and not more than 0.50.
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18. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; and an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel, wherein said second main surface has a center line average roughness of greater than 0 and not more than 200 nm.
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19. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; and an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel, wherein said second main surface has a maximum height of greater than 0 and not more than 2000 nm.
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20. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; and an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel, wherein a gate groove is formed in said first main surface of said semiconductor substrate, and said gate groove is filled with said gate electrode. - View Dependent Claims (21, 22)
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23. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; a collector region formed on said second main surface;
said collector region including a collector diffusion layer of a first conductivity type in contact with said second electrode, a buffer diffusion layer of a second conductivity type formed closer to the first main surface than said collector diffusion layer is, and a drift diffusion layer of the second conductivity type, and said drift diffusion layer being lower in impurity concentration than said buffer diffusion layer and formed adjacent to said buffer diffusion layer and closer to the first main surface than said buffer diffusion layer is;a body diffusion layer of the first conductivity type serving as said channel; and a buried diffusion layer of the second conductivity type formed between said body diffusion layer and said drift diffusion layer. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30)
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31. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; a first emitter diffusion layer of a first conductivity type formed on said first main surface and in contact with said first electrode; and a second emitter diffusion layer of a second conductivity type formed on said first main surface and in contact with said first electrode and said first emitter diffusion layer, wherein a ratio of a width of said second emitter diffusion layer along a direction in which said gate electrode extends to a sum of said width of the first emitter diffusion layer and a width of the second emitter diffusion layer along the direction in which said gate electrode extends is not less than 0.08 and not more than 0.20.
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32. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; and an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel, wherein an electric signal is transmitted to said gate electrode through a resistor body having a locally high electrical resistance value. - View Dependent Claims (33)
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34. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; a collector region formed on said second main surface; and a body diffusion layer of a first conductivity type being in contact with said collector region and serving as said channel, wherein said collector region includes a drift diffusion layer of a second conductivity type, and an electric field intensity in a junction plane between said drift diffusion layer and said body diffusion layer obtained when a reverse voltage is applied to said element is greater than 0 and not more than 3.0×
105 V/cm.
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35. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; a collector region formed on said second main surface; and a body diffusion layer of a first conductivity type being in contact with said collector region and serving as said channel, wherein said collector region includes a collector diffusion layer of the first conductivity type in contact with said second electrode, a buffer diffusion layer of a second conductivity type formed closer to the first main surface than said collector diffusion layer is, and a drift diffusion layer of the second conductivity type, and said drift diffusion layer is lower in impurity concentration than said buffer diffusion layer and formed adjacent to said buffer diffusion layer and closer to the first main surface than said buffer diffusion layer is, and an electric field intensity in a junction plane between said buffer diffusion layer and said drift diffusion layer obtained when a reverse voltage is applied to said element is not less than 2.0×
104 V/cm and not more than an electric field intensity in a junction plane between said drift diffusion layer and said body diffusion layer.
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36. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface, facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; and a body diffusion layer of a first conductivity type serving as said channel, wherein a gate groove is formed in said first main surface of said semiconductor substrate, and said gate groove is filled with said gate electrode, and a protrusion amount of said gate groove from a bottom of said body diffusion layer is not less than 1.0 μ
m and not more than a depth reaching said second main surface.
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37. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; a body diffusion layer of a first conductivity type serving as said channel; and
a buried diffusion layer of a second conductivity type formed adjacent to a side surface of said body diffusion layer as seen in plan view. - View Dependent Claims (38)
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39. A semiconductor device comprising:
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a semiconductor substrate having a first main surface and a second main surface facing each other; an element having a gate electrode formed on a side of said first main surface, a first electrode formed on the side of said first main surface, and a second electrode formed in contact with said second main surface, said element generating an electric field in a channel by a voltage applied to said gate electrode, and controlling a current between said first electrode and said second electrode by the electric field in said channel; and a collector region formed on said second main surface, said collector region including a collector diffusion layer of a first conductivity type in contact with said second electrode, a buffer diffusion layer of a second conductivity type formed closer to said first main surface than said collector diffusion layer is, and a drift diffusion layer of the second conductivity type, and said drift diffusion layer being lower in impurity concentration than said buffer diffusion layer and formed adjacent to said buffer diffusion layer and closer to the first main surface than said buffer diffusion layer is, wherein a ratio of the number of atoms per unit area of impurities forming said buffer diffusion layer to the number of atoms per unit area of impurities forming said drift diffusion layer is not less than 0.05 and not more than 100. - View Dependent Claims (44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75)
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40-43. -43. (canceled)
Specification