SEMICONDUCTOR ELEMENT FORMED IN A CRYSTALLINE SUBSTRATE MATERIAL AND COMPRISING AN EMBEDDED IN SITU N-DOPED SEMICONDUCTOR MATERIAL

• US 20100327358A1
• Filed: 06/24/2010
• Published: 12/30/2010
• Est. Priority Date: 06/30/2009
• Status: Abandoned Application

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: GlobalFoundries, Inc.
• Inventors: Wiatr, Maciej, Kronholz, Stephan, Boschke, Roman, Papageorgiou, Vassilios
• Application Number:
  US12/822,475
• Publication Number:
  US 20100327358A1
• Time in Patent Office: Days
• US Class Current: 257/350
• CPC Class Codes: H01L 27/1207 combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits

Abstract

The PN junction of a substrate diode in a sophisticated semiconductor device may be formed on the basis of an embedded in situ N-doped semiconductor material thereby providing superior diode characteristics. For example, a silicon/carbon semiconductor material may be formed in a cavity in the substrate material, wherein the size and shape of the cavity may be selected so as to avoid undue interaction with metal silicide material.

Claims

1. A method of forming a semiconductor device, the method comprising:

forming an opening in an isolation structure formed in a semiconductor layer of said semiconductor device so as to expose a portion of a well region of a crystalline material of a substrate of said semiconductor device;

forming a cavity in a portion of said crystalline material through said opening, said cavity having a greater lateral extension relative to said opening;

forming a semiconductor material in said cavity, at least a portion of said semiconductor material comprising an N-type dopant species; and

forming a metal silicide on the basis of said semiconductor material.

2. The method of claim 1, wherein forming said cavity comprises performing a selective isotropic etch process and using said isolation structure as an etch mask.

3. The method of claim 1, wherein forming said semiconductor material in said cavity comprises performing a selective epitaxial growth process.

4. The method of claim 3, wherein forming said semiconductor material further comprises introducing a precursor material containing said dopant species into a deposition ambient of said selective epitaxial growth process at least for a certain time interval.

5. The method of claim 1, wherein said semiconductor material comprises silicon and at least one non-silicon species.

6. The method of claim 5, wherein said at least one non-silicon species is carbon.

7. The method of claim 5, wherein forming said semiconductor material comprises forming a cap layer as a final layer of said semiconductor material, wherein a concentration of said at least one non-silicon species in said cap layer is less than a concentration of said at least one non-silicon species outside of said cap layer.

8. The method of claim 7, wherein said metal silicide is formed in said cap layer.

9. The method of claim 1, further comprising forming a transistor element in and above a semiconductor layer formed on said buried insulating layer, wherein said transistor element comprises an embedded semiconductor alloy.

10. The method of claim 9, wherein said embedded semiconductor alloy and said semiconductor material formed in said cavity are formed by a selective epitaxial growth technique performed on the basis of the same precursor materials.

11. The method of claim 10, wherein said embedded semiconductor alloy and said semiconductor material are formed in a common selective epitaxial growth process.

12. A method of forming a substrate diode of a semiconductor device, said method comprising:

forming an opening in a dielectric material formed on a crystalline substrate material of said semiconductor device;

forming a cavity in said crystalline substrate material through said opening;

filling at least a portion of said cavity with an N-doped semiconductor material; and

forming a metal silicide so as to electrically connect to said N-doped semiconductor material.

13. The method of claim 12, wherein filling at least a portion of said cavity with an N-doped semiconductor material comprises forming a semiconductor alloy.

14. The method of claim 13, wherein said semiconductor alloy comprises a silicon/carbon alloy.

15. The method of claim 12, further comprising forming a cap layer on said N-doped semiconductor material, wherein a silicon concentration of said cap layer is greater than a silicon concentration in said N-doped semiconductor material.

16. The method of claim 15, wherein said metal silicide is formed in said cap layer.

17. The method of claim 14, further comprising forming an N-type transistor element in a semiconductor layer formed above said crystalline substrate material, wherein said transistor element comprises an embedded silicon/carbon alloy.

18. The method of claim 17, wherein said N-doped semiconductor material and said embedded silicon/carbon alloy are formed by performing a common selective epitaxial growth process.

19. A semiconductor device, comprising:

a first N-doped region laterally embedded in a crystalline substrate material and comprising a semiconductor alloy;

a P-doped region formed in said crystalline substrate material, said N-doped region and said P-doped region forming a PN junction of a substrate diode;

a metal silicide formed in a portion of said N-doped region; and

an isolation structure formed in a semiconductor layer and on said crystalline substrate material, said isolation structure comprising an opening extending to said metal silicide.

20. The semiconductor device of claim 19, wherein a lateral extension of said semiconductor alloy is greater than a lateral extension of said opening.

21. The semiconductor device of claim 19, wherein said semiconductor alloy comprises silicon and carbon.

22. The semiconductor device of claim 19, further comprising a cap layer formed on said semiconductor alloy, wherein a concentration of a non-silicon species in said cap layer is less than a concentration of said non-silicon species in said semiconductor alloy.

23. The semiconductor device of claim 19, further comprising a transistor formed in and above said semiconductor layer, wherein said transistor comprises an embedded semiconductor alloy.

24. The semiconductor device of claim 23, wherein said semiconductor alloy of said substrate diode and said embedded semiconductor alloy comprise silicon and carbon.

25. The semiconductor device of claim 24, wherein said semiconductor alloy and said embedded semiconductor alloy have substantially the same material composition.