MULTI-GRADATION DRIVE CIRCUIT, DRIVING METHOD, AND DISPLAY DEVICE OF CHOLESTERIC LIQUID CRYSTAL PANEL

• US 20100328369A1
• Filed: 09/10/2010
• Published: 12/30/2010
• Est. Priority Date: 03/28/2008
• Status: Abandoned Application

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Shingai, Tomohisa
• Application Number:
  US12/879,225
• Publication Number:
  US 20100328369A1
• Time in Patent Office: Days
• US Class Current: 345/690
• CPC Class Codes: G02F 1/13718 based on a change of the texture state of a cholesteric liquid crystal
• CPC Class Codes: G02F 2203/30 Gray scale
• CPC Class Codes: G09G 2300/0486 Cholesteric liquid crystals, including chiral-nematic liquid crystals, with transitions between focal conic, planar, and homeotropic states
• CPC Class Codes: G09G 2330/025 Reduction of instantaneous peaks of current
• CPC Class Codes: G09G 3/3651 using multistable liquid crystals, e.g. ferroelectric liquid crystals

Abstract

A multi-gradation drive circuit that drives a cholesteric liquid crystal panel in a plurality of drive phases in different drive cycles, includes: a current upper limit control circuit that calculates an upper limit of a supply current of a liquid crystal drive power source and outputs an upper limit control signal; and a supply current limiting circuit that limits the supply current of the liquid crystal drive power source to the upper limit value or less specified by the upper limit control signal, wherein the current upper limit control circuit switches the upper limit control signal to another in accordance with the drive cycle in each drive phase.

Claims

1. A multi-gradation drive circuit that drives a cholesteric liquid crystal panel in a plurality of drive phases in different drive cycles, comprising:

a current upper limit control circuit configured to calculate an upper limit of a supply current of a liquid crystal drive power source and outputs an upper limit control signal; and

a supply current limiting circuit configured to limit the supply current of the liquid crystal drive power source to the upper limit value or less specified by the upper limit control signal, wherein

the current upper limit control circuit switches the upper limit control signal to another in accordance with the drive cycle in each drive phase.

2. The multi-gradation drive circuit according to claim 1, wherein the upper limit value of the supply current is the average current in each drive phase multiplied by a predetermined coefficient.

3. The multi-gradation drive circuit according to claim 2, wherein

the predetermined coefficient is a value not less than 1.5 and not more than 5.

4. The multi-gradation drive circuit according to claim 3, wherein

the predetermined coefficient is 2.

5. The multi-gradation drive circuit according to claim 2, wherein

the average current is given by Iave=C×

V/T where T is the drive cycle in each drive phase, lave is the average current, V is the output voltage in the drive cycle T, and C is the average load capacitance for the output voltage V in the drive cycle T.

6. The multi-gradation drive circuit according to claim 1, wherein

the current upper limit control circuit comprises:

a table that stores upper limit value data in advance of the supply current corresponding to the drive cycle with the drive cycle as an address; and

a signal conversion circuit that converts the upper limit value read from the table into a signal to be supplied to the supply current limiting circuit.

7. The multi-gradation drive circuit according to claim 6, wherein

the signal conversion circuit is a D/A converter.

8. The multi-gradation drive circuit according to claim 1, wherein

the supply current limiting circuit is an operational amplifier having an output current limit function.

9. The multi-gradation drive circuit according to claim 1, wherein

the supply current limiting circuit comprises:

a plurality of current limiting circuits connected in parallel via diodes and the current upper limit value of which is fixed; and

a decoder that selects a circuit to be brought into an operating state from among the plurality of current limiting circuits in accordance with a signal from the current upper limit control circuit.

10. The multi-gradation drive circuit according to claim 1, wherein

the current upper limit control circuit further comprises an actual load capacitance calculating circuit that calculates an actual load capacitance for the output voltage V in the drive cycle T in each drive phase, and

the upper limit value of the supply current is the average current Iave in each drive phase multiplied by a predetermined coefficient and the average current Iave is given by Iave=C×

V/T.

11. The multi-gradation drive circuit according to claim 10, wherein

the actual load capacitance calculating circuit has:

an ON pixel number calculating circuit that calculates the number of ON pixels in the data of an image to be displayed; and

a table that stores an actual load capacitance corresponding to the calculated number of ON pixels.

12. A cholesteric liquid crystal display device comprising:

a cholesteric liquid crystal panel; and

a multi-gradation drive circuit configured to drive the cholesteric liquid crystal panel in a plurality of drive phases in different drive cycles,

wherein the multi-gradation drive circuit comprises;

a current upper limit control circuit configured to calculate an upper limit of a supply current of a liquid crystal drive power source and outputs an upper limit control signal; and

a supply current limiting circuit configured to limit the supply current of the liquid crystal drive power source to the upper limit value or less specified by the upper limit control signal, wherein

the current upper limit control circuit switches the upper limit control signal to another in accordance with the drive cycle in each drive phase.

13. A multi-gradation driving method of driving a cholesteric liquid crystal display panel in a plurality of drive phases in different cycles, the method comprising:

calculating an upper limit value of a supply current of a power source for driving liquid crystal; and

switching the upper limit value of the supply current of the power source for driving liquid crystal to another in accordance with the drive cycle in each drive phase.