THIN WAFER HANDLING STRUCTURE AND METHOD

• US 20100330788A1
• Filed: 06/18/2010
• Published: 12/30/2010
• Est. Priority Date: 06/30/2009
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: HSU, Kuo-Ching, HSIAO, Ching-Wen, CHEN, Chen-Shien, YU, Chen-Hua
• Granted Patent: US 8,871,609 B2
• Time in Patent Office: Days
• US Class Current: 438/514
• CPC Class Codes: H01L 21/187 by direct bonding
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68318 Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
• CPC Class Codes: H01L 2221/68327 used during dicing or grinding
• CPC Class Codes: H01L 2221/68381 Details of chemical or physical process used for separating the auxiliary support from a device or wafer
• CPC Class Codes: Y10T 428/1476 Release layer

Abstract

A thin wafer handling structure includes a semiconductor wafer, a release layer that can be released by applying energy, an adhesive layer that can be removed by a solvent, and a carrier, where the release layer is applied on the carrier by coating or laminating, the adhesive layer is applied on the semiconductor wafer by coating or laminating, and the semiconductor wafer and the carrier is bonded together with the release layer and the adhesive layer in between. The method includes applying a release layer on a carrier, applying an adhesive layer on a semiconductor wafer, bonding the carrier and the semiconductor wafer, releasing the carrier by applying energy on the release layer, e.g. UV or laser, and cleaning the semiconductor'"'"'s surface by a solvent to remove any residue of the adhesive layer.

Claims

1. A thin wafer handling structure, comprising:

a semiconductor wafer;

a release layer that can be released by applying energy;

an adhesive layer that can be removed by a solvent; and

a carrier;

wherein the release layer is applied to the carrier by at least one of coating or laminating, the adhesive layer is applied to the semiconductor wafer by at least one of coating or laminating, and the semiconductor wafer and the carrier are bonded together with the release layer and the adhesive layer in between the semiconductor wafer and the carrier.

2. The structure of claim 1, wherein the carrier and the semiconductor wafer are bonded together by applying at least one of UV light or thermal energy.

3. The structure of claim 1, wherein the release layer goes through edge bead removal (EBR) process after the at least one of coating or laminating onto the carrier.

4. The structure of claim 3, wherein the EBR process removes the outer most 0.1 mm-3 mm of the release layer from an edge of the carrier.

5. The structure of claim 1, wherein the release layer is released by applying at least one of UV light or light from a laser.

6. The structure of claim 1, wherein the adhesive layer is thermal plastic polymer.

7. A method, comprising:

applying a release layer on a carrier by at least one of coating or lamination;

applying an adhesive layer to a semiconductor wafer by at least one of coating or lamination;

bonding the carrier and the semiconductor wafer with the release layer and the adhesive layer in between the carrier and the semiconductor wafer;

releasing the carrier by applying energy to the release layer; and

cleaning a surface of the semiconductor wafer with a solvent to remove any residue of the adhesive layer.

8. The method of claim 7, further comprising performing a post-bonding process on the semiconductor wafer.

9. The method of claim 8, wherein the post-bonding process includes grinding and/or wafer backside processing.

10. The method of claim 9, wherein the wafer backside processing includes at least one of ion implantation, annealing, etching, sputtering, evaporation or metallization.

11. The method of claim 7, wherein the carrier and the semiconductor wafer are bonded together by applying UV light or thermal energy.

12. The method of claim 7, wherein the release layer is released by applying UV light or light from a laser.

13. The method of claim 7, wherein the adhesive layer is thermal plastic polymer that can be chemically cleaned with a solvent.

14. The method of claim 7, further comprising performing edge bead removal (EBR) process on the release layer after coating or laminating onto the carrier.

15. The method of claim 14, wherein the EBR process removes the outer most 0.1 mm-3 mm.

16. A method, comprising:

applying a release layer to a carrier by at least one of coating or lamination;

applying an adhesive layer to a semiconductor wafer by at least one of coating or lamination;

bonding the carrier and the semiconductor wafer with the release layer and the adhesive layer in between the carrier and the semiconductor wafer by applying UV light or thermal energy;

performing a post-bonding process on the semiconductor wafer;

releasing the carrier by energy application to the release layer by applying UV light or light from a laser; and

cleaning a surface of the semiconductor wafer with a solvent to remove any residue from the adhesive layer.

17. The method of claim 16, wherein the post-bonding process includes at least one of grinding or wafer backside processing.

18. The method of claim 17, wherein the wafer backside processing includes at least one of ion implantation, annealing, etching, sputtering, evaporation, or metallization.

19. The method of claim 16, wherein the adhesive layer is thermal plastic polymer that can be chemically cleaned with a solvent.

20. The method of claim 16, further comprising performing edge bead removal (EBR) process on the release layer after coating or laminating onto the carrier.