NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME

• US 20110001178A1
• Filed: 12/23/2009
• Published: 01/06/2011
• Est. Priority Date: 07/01/2009
• Status: Active Grant

• Current Assignee: Kioxia Corporation
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: IWASE, Masao, Iguchi, Tadahi
• Granted Patent: US 8,247,860 B2
• Time in Patent Office: Days
• US Class Current: 257/315
• CPC Class Codes: H01L 29/40117 the electrodes comprising a charge-trapping insulator
• CPC Class Codes: H01L 29/66833 with a charge trapping gate insulator, e.g. MNOS transistors
• CPC Class Codes: H01L 29/792 with charge trapping gate insulator, e.g. MNOS-memory transistors
• CPC Class Codes: H01L 29/7926 Vertical transistors, i.e. transistors having source and drain not in the same horizontal plane
• CPC Class Codes: H10B 43/20 characterised by three-dimensional arrangements, e.g. with cells on different height levels
• CPC Class Codes: H10B 43/27 the channels comprising vertical portions, e.g. U-shaped channels
• CPC Class Codes: H10B 43/50 characterised by the boundary region between the core and peripheral circuit regions

Abstract

A nonvolatile semiconductor memory device includes: a substrate; a stacked body with a plurality of dielectric films and electrode films alternately stacked therein, the stacked body being provided on the substrate and having a step in its end portion for each of the electrode films; an interlayer dielectric film burying the end portion of the stacked body; a plurality of semiconductor pillars extending in the stacking direction of the stacked body and penetrating through a center portion of the stacked body; a charge storage layer provided between one of the electrode films and one of the semiconductor pillars; and a plug buried in the interlayer dielectric film and connected to a portion of each of the electrode films constituting the step, a portion of each of the dielectric films in the center portion having a larger thickness than a portion of each of the dielectric films in the end portion.

Claims

1. A nonvolatile semiconductor memory device comprising:

a substrate;

a stacked body with a plurality of dielectric films and electrode films alternately stacked therein, the stacked body being provided on the substrate and having a step in its end portion for each of the electrode films;

an interlayer dielectric film burying the end portion of the stacked body;

a plurality of semiconductor pillars extending in the stacking direction of the stacked body and penetrating through a center portion of the stacked body;

a charge storage layer provided between one of the electrode films and one of the semiconductor pillars; and

a plug buried in the interlayer dielectric film and connected to a portion of each of the electrode films constituting the step,

a portion of each of the dielectric films in the center portion having a larger thickness than a portion of each of the dielectric films in the end portion.

2. The device according to claim 1, wherein the center portion of the stacked body has a larger thickness than the end portion of the stacked body.

3. The device according to claim 1, wherein the thickness of each of the dielectric films between the semiconductor pillars becomes thicker toward each of the semiconductor pillars.

4. The device according to claim 1, wherein a portion of each of the electrode films in the end portion has a larger thickness than a portion of each of the electrode films in the center portion.

5. The device according to claim 4, wherein the thickness of each of the dielectric films between the semiconductor pillars becomes thicker toward each of the semiconductor pillars.

6. The device according to claim 4, wherein the center portion of the stacked body has a larger thickness than the end portion of the stacked body.

7. The device according to claim 6, wherein the thickness of each of the dielectric films between the semiconductor pillars becomes thicker toward each of the semiconductor pillars.

8. The device according to claim 1, wherein the dielectric films are formed from an oxide of a material forming the electrode film.

9. The device according to claim 8, wherein the electrode films are formed from silicon, and the dielectric film is formed from silicon oxide.

10. The device according to claim 1, wherein the stacked body includes:

a back gate electrode provided below the electrode films; and

a connecting member provided in the back gate electrode and interconnecting between a lower end portion of one of the semiconductor pillars and a lower end portion of another of the semiconductor pillars.

11. The device according to claim 10, further comprising:

a source line provided on the stacked body and connected to an upper end portion of the one of the semiconductor pillars connected to the connecting member; and

a bit line provided on the stacked body and connected to an upper end portion of the another of the semiconductor pillars connected to the connecting member.

12. The device according to claim 11, wherein the bit line is provided above the source line, and an extending direction of the bit line is orthogonal to an extending direction of the source line.

13. A method for manufacturing a nonvolatile semiconductor memory device, comprising:

forming a stacked body by alternately stacking a plurality of dielectric films and electrode films on a substrate;

forming a plurality of memory holes extending in a stacking direction of the stacked body in a center portion of the stacked body;

oxidizing, through the memory holes, at least a portion located between the memory holes in a portion of each of the electrode films in contact with the dielectric films;

forming a charge storage layer on an inner surface of each of the memory holes;

forming a plurality of semiconductor pillars by burying a semiconductor material in the memory holes;

forming a step for each of the electrode films in an end portion of the stacked body;

forming an interlayer dielectric film so as to bury the end portion of the stacked body;

forming a plug hole in the interlayer dielectric film so as to reach a portion of each of the electrode films constituting the step; and

forming a plug by burying a conductive material in the plug hole.

14. The method according to claim 13, wherein the oxidizing is performed so that bird'"'"'s beaks grown starting from adjacent ones of the memory holes are joined to each other.

15. The method according to claim 13, wherein the oxidizing is performed without oxidizing the electrode films in the end portion of the stacked body.

16. The method according to claim 13, wherein the oxidizing includes heating in an oxygen atmosphere.

17. The method according to claim 13, wherein the dielectric films are formed from an oxide of a material forming the electrode films, in the forming the stacked body.

18. The method according to claim 17, wherein the electrode films are formed from silicon, and the dielectric films are formed from silicon oxide, in the forming the stacked body.

19. The method according to claim 13, wherein

the forming the stacked body includes:

forming a back gate electrode on the substrate;

forming a recess in an upper surface of the back gate electrode; and

burying a sacrificial member in the recess,

the forming the plurality of the memory holes is performed so that one of the memory holes reaches one end portion of the sacrificial member and another of the memory holes reaches another end portion of the sacrificial member,

a portion of each of the electrode films exposed to the inner surface of each of the memory holes is also oxidized to form an oxide film covering the electrode films in the oxidizing, and

the sacrificial member is further removed by etching through the memory holes after the oxidizing and before the forming the charge storage layer.

20. The method according to claim 19, further comprising:

removing the oxide film covering the electrode films after the removing the sacrificial member and before the forming the charge storage layer.