Frequency Divider

• US 20110001521A1
• Filed: 07/02/2009
• Published: 01/06/2011
• Est. Priority Date: 07/02/2009
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Bevilacqua, Andrea, Lorenzon, Leonardo, DaDalt, Nicola
• Granted Patent: US 9,054,711 B2
• Time in Patent Office: Days
• US Class Current: 327/115
• CPC Class Codes: H03K 23/52 using field-effect transistors
• CPC Class Codes: H03K 23/542 with crossed-couplings, i.e. Johnson counters
• CPC Class Codes: H03K 23/544 with a base which is an odd number

Abstract

This disclosure relates to a divide-by-N frequency divider system and frequency dividing method. The system includes a ring oscillator having M stages, where M is an integer, and a zero mean current component coupled to one or more of the stages to provide a zero mean current flow path.

Claims

1. A divide-by-N frequency divider system, where N is an integer, comprising:

a ring oscillator having M stages, where M is an integer, the ring oscillator configured to receive an injection input signal and provide an output signal; and

a zero mean current component coupled to one or more of the stages to provide a zero mean current flow path.

2. The divide-by-N frequency divider system according to claim 1 wherein the zero mean current component comprises one or more capacitors.

3. The divide-by-N frequency divider system according to claim 1, wherein N is equal to M.

4. The divide-by-N frequency divider system according to claim 1, wherein at least one of N or M is equal to 7.

5. The divide-by-N frequency divider system according to claim 1, wherein each stage comprises a stage component and at least one injection device coupled between the stage component and the zero mean current component, the at least one injection device configured to receive the injection input signal.

6. The divide-by-N frequency divider system according to claim 1, wherein the ring oscillator is a differential ring oscillator, and each stage comprises:

a stage component having a first output terminal and a second output terminal;

a first injection device coupled between the first output terminal of the stage component and the zero mean current component; and

a second injection device coupled between the second output terminal of the stage component and the zero mean current component.

7. The divide-by-N frequency divider system according to claim 1, wherein N is an integer greater than 1, and wherein each of the stages is coupled to a tail current source.

8. The divide-by-N frequency divider system according to claim 1, wherein the output signal has a frequency equal to 1/N of the injection input signal to be divided, where M is different than N.

9. The divide-by-N frequency divider system according to claim 1, wherein the output signal has a frequency equal to 1/N of the injection input signal to be divided, where M is equal to N.

10. The divide-by-N frequency divider system according to claim 1 further comprising at least one tail current source coupled to at least one stage of the ring oscillator.

11. The divide-by-N frequency divider system according to claim 1 wherein each stage comprises a Complementary Metal Oxide Semiconductor (CMOS) inverter and at least one injection device coupled between the CMOS inverter and the zero mean current component.

12. The divide-by-N frequency divider system according to claim 11, wherein at least one injection device comprises a transistor.

13. The divide-by-N frequency divider system according to claim 12, wherein the transistor comprises a gate, source, and drain, the gate configured to receive an injection voltage, the source coupled to the zero mean current component, and the drain coupled to a node of the ring oscillator.

14. A frequency divider system comprising:

a plurality of stages, each stage including a stage component and an injection device coupled to the stage component; and

a zero mean current component coupled to the injection device to provide a zero mean current flow path.

15. The frequency divider system according to claim 14, wherein the stage component is a differential delay stage having a first output terminal and a second output terminal, and wherein the injection device is a first injection device coupled between the first output terminal of the stage component and the zero mean current component, the stage component further comprising a second injection device coupled between the second output terminal of the stage component and the zero mean current component.

16. The frequency divider system according to claim 14, further comprising at least one tail current source coupled to at least one of the stages.

17. The frequency divider system according to claim 14, wherein the zero mean current component comprises a capacitor.

18. A method comprising:

providing an input signal having a frequency to be divided to a stage of a ring oscillator, the stage having a stage component and an injection device;

coupling the injection device to a zero mean current component;

mixing, using the injection device, an injected signal and a signal representing a harmonic of a fundamental frequency of the ring oscillator; and

providing at a node of the ring oscillator an output signal having a frequency that is a fraction of the frequency of the input signal.

19. The method according to claim 18, further comprising coupling the stage to a tail current source.

20. The method according to claim 18, wherein the zero mean current component is a capacitor.

21. The method according to claim 18, wherein the stage is one of M stages of the ring oscillator and the output signal has a frequency equal to 1/N of that of the input signal to be divided, with M having a value different than N.

22. The method according to claim 18, wherein the stage is one of M stages of the ring oscillator and the output signal has a frequency equal to 1/N of that of the input signal to be divided, with M having a value that is equal to N.