POWER RECTIFIER CIRCUIT AND SYSTEMS, ASSOCIATED METHOD, AND AIRCRAFT COMPRISING SUCH A CIRCUIT OR SYSTEMS

• US 20110002148A1
• Filed: 01/21/2009
• Published: 01/06/2011
• Est. Priority Date: 01/31/2008
• Status: Active Grant

• Current Assignee: Centre National De La Recherche Scientifique, Airbus Operations (European Aeronautic Defence and Space Company EADS NV), Institut National Polytechnique de Toulouse
• Original Assignee: Centre National De La Recherche Scientifique, Airbus Operations (European Aeronautic Defence and Space Company EADS NV), Institut NAT Polytechnique de Toulouse
• Inventors: Helali, Hassan, Meynard, Thierry, Richardeau, Frederic, Iturriz, Marcelo Fernando
• Granted Patent: US 8,467,206 B2
• Time in Patent Office: Days
• US Class Current: 363/126
• CPC Class Codes: H02M 7/10 arranged for operation in series, e.g. for multiplication of voltage
• CPC Class Codes: H02M 7/25 arranged for operation in series, e.g. for multiplication of voltage

Abstract

A power rectifying circuit for an electric current signal supplied by an alternating power source, which includes: two separate switching assemblies adapted to be connected to a power terminal of the source, wherein at least one switching assembly includes a plurality of boost cells in cascade, each boost cell including a diode, a switch mechanism and a capacitor, the capacitors of the two terminal boost cells of the switching assemblies having one terminal in common. The circuit may include two assemblies of boost cells, and can be used in electric systems onboard aircrafts.

Claims

1-10. -10. (canceled)

11. A power rectifying circuit for electrical current delivered by an alternating current source, comprising:

two separate commutation assemblies arranged to be connected to a supply terminal of a source, at least one commutation assembly comprising a plurality of commutation boost cells in cascade;

each boost cell comprising a diode connected between a first input terminal and a first output terminal of the cell, a switch means connected between a second input terminal and a second output terminal of the cell, and a capacitor connected between the two output terminals of the cell,

the boost cells of a commutation assembly being arranged in cascade so that the first and second output terminals of one boost cell are connected respectively to the first and second input terminals of the following boost cell,

the capacitors of the two terminal boost cells of the commutation assemblies having one terminal in common.

12. A circuit according to claim 11, wherein each commutation assembly comprises two boost cells.

13. A circuit according to claim 11, further comprising a pair of rectifying means arranged to be connected between the supply terminal and respectively each of the commutation assemblies, so as to rectify a low-frequency input current.

14. A circuit according to claim 11, further comprising blocking means for blocking all the switch means of the device in case of detection of a low-impedance fault in one of the boost cells.

15. A circuit according to claim 14, further comprising means for detecting a low-impedance failure in a boost cell arranged to detect a voltage at terminals of the switch means of the cell during a predetermined time interval following a control signal to start the switch means to detect a fault of the boost diode of the cell or following a control signal to block the switch means to detect a fault of the switch means.

16. A power rectifying system for electrical current delivered by a multi-phase alternating current supply source, comprising:

a plurality of power rectifying circuits according to claim 11, arranged such that each can be connected to a supply terminal connected to respectively each of phases of the multi-phase current, and in which the circuits share the same terminal capacitors.

17. A power rectifying system for the electrical current delivered by an alternating current supply source, comprising:

two power rectifying circuits according to claim 11, arranged to be connected respectively to each of terminals of the supply source, and in which the circuits share the same terminal capacitors.

18. A system according to claim 17, in which the two circuits are combined to exclusion of rectifying means provided between each of the terminals of the source and each input of the two commutation assemblies, the rectifying means connected to a given commutation assembly being exclusive, in opposite directions of current flow.

19. The circuit according to claim 13, wherein each power rectifying means comprise a diode.

20. The circuit according to claim 13, wherein each power rectifying means comprises a thyristor.

21. The circuit according to claim 13, wherein the power rectifying means are in serial with a same forward direction than the diodes of the switching assembly to which the power rectifying means are connected.

22. The circuit according to claim 11, wherein the switch means comprises controlled transistors.

23. The circuit according to claim 11, further comprising sensing means for sensing a low impedance fault in a boost cell, the sensing means to sense a voltage between the terminals of the switch means during a prefixed time period, following a command for booting the switch means to sense a fault in the boost diode of the cell or following a command for blocking the switch means to sense a fault in the switch means.

24. The circuit according to claim 23, wherein the sensing means for sensing low impedance fault comprises a transistor controller that is coupled to a voltage detector.

25. The system according to claim 16, wherein a cell of one of the rectifying circuits and the corresponding cell in the other circuit share the same capacitor.

29. An aircraft comprising a device or a system according to claim 11.

26. A power rectifying method for an electrical current signal delivered by an alternating current supply source, the method being achieved by a rectifying circuit comprising:

two separate commutation assemblies arranged to be connected to a supply terminal of the source, at least one commutation assembly comprising a plurality of commutation boost cells in cascade,

each boost cell comprising a diode connected between a first input terminal and a first output terminal of the cell, a switch means connected between a second input terminal and a second output terminal of the cell, and a capacitor connected between the two output terminals of the cell,

the boost cells of a commutation assembly being arranged in cascade so that the first and second output terminals of a boost cell are connected respectively to the first and second input terminals of the following boost cell, and

the capacitors of the two terminal boost cells of the assemblies having one common terminal,

the method comprising sequential control of each of the switch means so as to deliver DC voltages to the terminals of the terminal capacitors.

27. The method according to claim 26, further comprising sensing a low impedance fault in at least one of the boost cells, and following the sensing, blocking the switching means in the boost cells.

28. The method according to claim 26, further comprising forcing the switching means of a switching assembly to be in a forward state when the other switching assembly is active during an alternation of the input current.