MEMORY WITH OUTPUT CONTROL
First Claim
1. A memory device comprising:
- memory banks each having a page buffer for receiving read data from a corresponding memory array and for receiving write data;
interface circuits each having data inputs for receiving the write data and data outputs for providing the read data; and
switching circuitry for coupling any one of the interface circuits with any one of the memory banks.
11 Assignments
0 Petitions
Accused Products
Abstract
An apparatus, system, and method for controlling data transfer to an output port of a serial data link interface in a semiconductor memory is disclosed. In one example, a flash memory device may have multiple serial data links, multiple memory banks and control input ports that enable the memory device to transfer the serial data to a serial data output port of the memory device. In another example, a flash memory device may have a single serial data link, a single memory bank, a serial data input port, a control input port for receiving output enable signals. The flash memory devices may be cascaded in a daisy-chain configuration using echo signal lines to serially communicate between memory devices.
-
Citations
2 Claims
-
1. A memory device comprising:
-
memory banks each having a page buffer for receiving read data from a corresponding memory array and for receiving write data; interface circuits each having data inputs for receiving the write data and data outputs for providing the read data; and switching circuitry for coupling any one of the interface circuits with any one of the memory banks.
-
-
2. A method of operating a semiconductor memory device, comprising:
-
receiving at least two instructions by at least two interface circuits; selectively coupling each of the at least two interface circuits to at least two memory banks; and executing the at least two instructions in the at least two memory banks concurrently.
-
Specification