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MEMORY WITH OUTPUT CONTROL

  • US 20110002171A1
  • Filed: 09/15/2010
  • Published: 01/06/2011
  • Est. Priority Date: 09/30/2005
  • Status: Active Grant
First Claim
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1. A memory device comprising:

  • memory banks each having a page buffer for receiving read data from a corresponding memory array and for receiving write data;

    interface circuits each having data inputs for receiving the write data and data outputs for providing the read data; and

    switching circuitry for coupling any one of the interface circuits with any one of the memory banks.

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