Connection scheme for multiple battery cells

• US 20110003182A1
• Filed: 07/06/2009
• Published: 01/06/2011
• Est. Priority Date: 07/06/2009
• Status: Active Grant

• Current Assignee: Amperex Technology Limited (TDK Corporation)
• Original Assignee: Amperex Technology Limited (TDK Corporation)
• Inventors: Zhu, Li-Yan
• Granted Patent: US 9,005,788 B2
• Time in Patent Office: Days
• US Class Current: 429/50
• CPC Class Codes: H01M 10/0525 Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries
• CPC Class Codes: H01M 10/482 for several batteries or cells simultaneously or sequentially
• CPC Class Codes: H01M 10/617 for achieving uniformity or desired distribution of temperature
• CPC Class Codes: Y02E 60/10 Energy storage using batteries

Abstract

A series-parallel battery system with a buffer resistor coupled to each junction of batteries or battery cells. Buffer resistors on the same row are coupled to a measurement node. Terminals of the battery system and the measurement nodes are treated as measurement points that are coupled to a conventional battery management unit. The buffer resistors provide a means for limiting in-rush current and a means for maintaining voltage balance across the row of batteries in the parallel columns of batteries. A control unit in series with each series of batteries monitors current in the series and comprises a switch to deactivate the column when the current exceeds a set of predetermined current levels.

Claims

1. A battery management system, comprising:

a) a series-parallel battery system further comprising m columns, wherein each column comprises n batteries connected in series between the negative and positive terminals of the battery system;

b) n−

1 measurement nodes corresponding to n−

1 batteries in each of the m columns, wherein a buffer resistor connected from a positive terminal of each of the n=1 batteries located in the m columns to the n=1 measurement node, said buffer resistor connected from the positive terminal of each n=2 battery in the m columns to the n=2 measurement node, and continuing in like manner until said buffer resistor connected from the positive terminal of each n−

1 battery in the m columns to the n−

1 measurement node;

c) said positive battery terminal of the nth battery in the m columns coupled to the positive terminal of the battery system and the negative terminal of the n=1 battery in the m columns coupled to the minus terminal of the battery system; and

c) said n=1 to n−

1 measurement nodes provide a measurement of battery system performance and detect a failure of said battery system.

2. The system of claim 1, wherein said series-parallel battery system further comprises a control unit in each of the m columns for adjustment of current distribution among the m columns.

3. The system of claim 2, wherein said control unit further comprises a current sensor to monitor current and a switch controlled by a battery management unit (BMU) to turn off a failing column of the m columns of batteries.

4. The system of claim 3, wherein said BMU monitors voltage of each battery in the battery system.

5. The system of claim 1, wherein said buffer resistors are coupled to m−

1 columns of batteries, and batteries in the mth column are coupled directly to the measurement nodes.

6. The system of claim 1, wherein said batteries are selected and grouped such that batteries in the same column are of approximately the same capacity, and a product of capacity and internal resistance of the batteries are approximately identical among columns in the battery system.

7. The system of claim 1, wherein said battery system further comprises packaging and cooling arranged such that an average temperature of batteries in each column is approximately identical.

8. The system of claim 1, wherein said buffer resistors are larger in resistance value than an internal resistance of the batteries to which the buffer resistors are connected, large enough in resistance value to limit in-rush current and small enough in resistance value to allow inter column current to maintain voltage balance across a row of batteries located in the m columns.

9. A method for managing performance of a series-parallel battery system, comprising:

a) forming a battery from m columns and n rows of battery cells connected in a series-parallel configuration, wherein the battery cells in the m columns connected in series between the plus and minus terminals of the battery;

b) forming n−

1 measurement nodes, wherein a positive terminal of the battery cells in each column of a row of battery cells connected to one of said measurement nodes through a buffer resistor, wherein said one of the measurement nodes represents said row;

c) connecting said n−

1 measurement nodes to a battery management unit (BMU), which selects said measurement node to be measured;

d) inserting a control unit in each m columns of battery cells; and

e) measuring current flow in each m columns with said control unit to adjust current distribution among said m columns.

10. The method of claim 9, wherein said control unit further comprises a current sensor to monitor current and a switch controlled by the BMU to turn off a failing column of the m columns of battery cells.

11. The method of claim 9, wherein said buffer resistors have a resistance larger than an internal resistance of the battery cells, have a resistance value large enough to limit in-rush current and small enough in resistance value to allow inter column current flow to maintains a voltage balance across said row of battery cells in the m columns.

12. The method of claim 9, wherein said buffer resistors coupled to m-1 columns of battery cells, and the mth column of battery cells coupled directly to said measurement nodes

13. The method of claim 9 wherein said battery cells selected and grouped such that battery cells in a same column of the m columns are of a same capacity, and a product of cell capacity and cell internal resistance are approximately identical among the m columns.

14. The method of claim 9, wherein said battery further comprises packaging and cooling such that an average temperature of said cells in each column is approximately identical.

15. The method of claim 9, wherein said BMU monitors voltage of each cell of the m columns of battery cells.