LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME

• US 20110003407A1
• Filed: 09/15/2010
• Published: 01/06/2011
• Est. Priority Date: 06/19/2008
• Status: Active Grant

• Current Assignee: Seoul Viosys Co., Ltd. (Seoul Semiconductor Co., Ltd.)
• Original Assignee: Seoul Optodevice Company Limited (Seoul Semiconductor Co., Ltd.)
• Inventors: Yoon, Yeo Jin, Kim, Chang Yeon
• Granted Patent: US 8,247,244 B2
• Time in Patent Office: Days
• US Class Current: 438/22
• CPC Class Codes: H01L 33/14 with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• CPC Class Codes: H01L 33/24 of the light emitting region, e.g. non-planar junction

Abstract

There are provided a light emitting device and a method of manufacturing the same. A light emitting device according to the present invention includes a substrate; an N-type semiconductor layer, an active layer and a P-type semiconductor layer, sequentially formed on the substrate; one or more trenches formed to expose the N-type semiconductor layer by partially removing at least the P-type semiconductor and active layers; a first insulating layer formed on sidewalls of the trenches; and a conductive layer filled in the trenches having the first insulating layer formed therein. According to the present invention, it is possible to obtain a characteristic of uniform current diffusion, and thus, light is uniformly emitted to thereby enhance the light emitting efficiency.

Claims

1. A method of manufacturing a light emitting device, the method comprising:

forming an N-type semiconductor layer, an active layer, and a P-type semiconductor layer on a substrate;

etching the P-type semiconductor layer and active layer to form a plurality of trenches comprising a mesh structure, the trenches to expose the N-type semiconductor layer; and

forming a conductive layer on the N-type semiconductor layer by disposing a conductive material in the trenches.

2. The method of claim 1, further comprising forming a hole to expose the N-type semiconductor layer.

3. The method of claim 2, further comprising forming a first electrode on the N-type semiconductor layer in the hole.

4. The method of claim 1, further comprising forming an insulating layer on sidewalls of the trenches before forming the conductive layer.

5. The method of claim 1, further comprising forming an insulating layer on the conductive layer.

6. The method of claim 5, further comprising:

forming a transparent electrode on the P-type semiconductor layer after forming the insulating layer; and

forming a second electrode on the transparent electrode.

7. The method of claim 6, further comprising removing at least a portion of the transparent electrode to expose a portion of the P-type semiconductor layer before forming the second electrode, wherein the second electrode is formed to be in contact with the exposed P-type semiconductor layer.