DISPLAY DEVICE INCLUDING TRANSISTOR AND MANUFACTURING METHOD THEREOF

• US 20110003418A1
• Filed: 07/01/2010
• Published: 01/06/2011
• Est. Priority Date: 07/03/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: HOSOBA, Miyuki, SASAKI, Toshinari, SAKATA, Junichiro
• Granted Patent: US 8,304,300 B2
• Time in Patent Office: Days
• US Class Current: 438/34
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 27/1218 with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78633 with a light shield
• CPC Class Codes: H01L 29/78645 with multiple gate
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/78654 Monocrystalline silicon transistors
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.

Claims

1. A method for manufacturing a display device comprising the steps of:

forming a first gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the first gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

performing dehydration or dehydrogenation on the oxide semiconductor layer;

forming source and drain electrode layers over the oxide semiconductor layer on which the dehydration or dehydrogenation is performed;

forming a protective layer over the gate insulating layer, the oxide semiconductor layer and the source and drain electrode layers, in contact with part of the oxide semiconductor layer;

forming a planarizing layer over the protective layer; and

forming a second gate electrode layer over the planarizing layer.

2. The method for manufacturing a display device according to claim 1, wherein the display device includes a pixel portion and a driver circuit portion.

3. The method for manufacturing a display device according to claim 1, wherein the dehydration or dehydrogenation is performed under a nitrogen atmosphere or a rare gas atmosphere.

4. A method for manufacturing a display device comprising the steps of:

forming a first gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the first gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

heating the oxide semiconductor layer under an inert atmosphere so that a carrier concentration of the oxide semiconductor layer is increased;

forming source and drain electrode layers over the oxide semiconductor layer on which dehydration or dehydrogenation is performed;

forming a protective layer over the gate insulating layer, the oxide semiconductor layer and the source and drain electrode layers, in contact with part of the oxide semiconductor layer so that a carrier concentration of a portion of the oxide semiconductor layer which is in contact with the protective layer is decreased;

forming a planarizing layer over the protective layer; and

forming a second gate electrode layer over the planarizing layer.

5. The method for manufacturing a display device according to claim 4, wherein the display device includes a pixel portion and a driver circuit portion.

6. The method for manufacturing a display device according to claim 4, wherein the increased carrier concentration of the oxide semiconductor layer is 1×

10¹⁸/cm³ or more.

7. The method for manufacturing a display device according to claim 4, wherein the decreased carrier concentration of the oxide semiconductor layer is 1×

10¹⁴/cm³ or less.

8. The method for manufacturing a display device according to claim 4, wherein the inert atmosphere is a nitrogen atmosphere or a rare gas atmosphere.

9. The method for manufacturing a display device according to claim 4, wherein the step of heating the oxide semiconductor layer is performed at 400°

C. or higher.

10. The method for manufacturing a display device according to claim 4, after the step of heating the oxide semiconductor layer, further comprising the step of cooling the oxide semiconductor layer to greater than or equal to a room temperature and less than 100°

C.

11. A method for manufacturing a display device comprising the steps of:

forming a first gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the first gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

heating the oxide semiconductor layer under reduced pressure so that a carrier concentration of the oxide semiconductor layer is increased;

forming source and drain electrode layers over the oxide semiconductor layer on which dehydration or dehydrogenation is performed;

forming a protective layer over the gate insulating layer, the oxide semiconductor layer and the source and drain electrode layers, in contact with part of the oxide semiconductor layer so that a carrier concentration of a portion of the oxide semiconductor layer which is in contact with the protective layer is decreased;

forming a planarizing layer over the protective layer; and

forming a second gate electrode layer over the planarizing layer.

12. The method for manufacturing a display device according to claim 11, wherein the display device includes a pixel portion and a driver circuit portion.

13. The method for manufacturing a display device according to claim 11, wherein the increased carrier concentration of the oxide semiconductor layer is 1×

10¹⁸/cm³ or more.

14. The method for manufacturing a display device according to claim 11, wherein the decreased carrier concentration of the oxide semiconductor layer is 1×

10¹⁴/cm³ or less.

15. The method for manufacturing a display device according to claim 11, wherein the step of heating the oxide semiconductor layer is performed at 400°

C. or higher.

16. The method for manufacturing a display device according to claim 11, after the step of heating the oxide semiconductor layer, further comprising the step of cooling the oxide semiconductor layer to greater than or equal to a room temperature and less than 100°

C.

17. A method for manufacturing a display device comprising the steps of:

forming a first gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the first gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

heating the oxide semiconductor layer to lower a concentration of hydrogen in the oxide semiconductor layer;

forming source and drain electrode layers over the oxide semiconductor layer on which dehydration or dehydrogenation is performed;

forming a protective layer over the gate insulating layer, the oxide semiconductor layer and the source and drain electrode layers, in contact with part of the oxide semiconductor layer;

forming a planarizing layer over the protective layer; and

forming a second gate electrode layer over the planarizing layer.

18. The method for manufacturing a display device according to claim 17, wherein the display device includes a pixel portion and a driver circuit portion.

19. The method for manufacturing a display device according to claim 17, wherein the step of heating the oxide semiconductor layer is performed at 400°

C. or higher.

20. The method for manufacturing a display device according to claim 17, after the step of heating the oxide semiconductor layer, further comprising the step of cooling the oxide semiconductor layer to greater than or equal to a room temperature and less than 100°

C.