Power Device With Trenches Having Wider Upper Portion Than Lower Portion

• US 20110003449A1
• Filed: 09/16/2010
• Published: 01/06/2011
• Est. Priority Date: 05/20/2003
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Becky Losee, Dean Probst, Robert Herrick
• Inventors: Probst, Dean, Herrick, Robert, Losee, Becky
• Granted Patent: US 8,034,682 B2
• Time in Patent Office: Days
• US Class Current: 438/270
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: Y10S 257/905 Plural dram cells share common contact or common trench

Abstract

A method of forming a semiconductor device includes the following. Removing portions of a silicon layer such that a trench having sidewalls which fan out near the top of the trench to extend directly over a portion of the silicon layer is formed in the silicon layer; and forming source regions in the silicon layer adjacent the trench sidewall such that the source regions extend into the portions of the silicon layer directly over which the trench sidewalls extend.

Claims

1-12. -12. (canceled)

13. A method of forming a semiconductor device, comprising:

removing portions of a silicon layer such that a trench having sidewalls which fan out near the top of the trench to extend directly over a portion of the silicon layer is formed in the silicon layer; and

forming source regions in the silicon layer adjacent the trench sidewall such that the source regions extend into the portions of the silicon layer directly over which the trench sidewalls extend.

14. A method of forming a semiconductor device, comprising:

removing portions of a silicon layer such that a plurality of trenches are formed each having sidewalls which fan out near the top of the trench to extend directly over a portion of the silicon layer adjacent each trench sidewall;

forming a gate electrode partially filling each trench;

forming an insulating layer in each trench, the insulating layer extending over each gate electrode and over the portions of the silicon layer which extend directly under the trench sidewalls; and

removing exposed silicon to expose an edge of the insulating layer in each trench, the exposed edge of the insulating layer in each trench defining a portion of each contact opening formed between every two adjacent trenches.

15. The method of claim 14 further comprising:

forming a first region of a first conductivity type in the silicon layer, wherein the step of removing exposed silicon removes portions of the first region such that of the first region only portions adjacent each trench sidewall remain, the remaining portions of the first region adjacent each trench sidewall forming a source region of the semiconductor device.