SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20110012118A1
• Filed: 07/14/2010
• Published: 01/20/2011
• Est. Priority Date: 07/18/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: UOCHI, Hideki, KUWABARA, Hideaki, MIYAKE, Hiroyuki, YAMAZAKI, Shunpei, SAKATA, Junichiro
• Granted Patent: US 8,293,594 B2
• Time in Patent Office: Days
• US Class Current: 257/59
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/45 Ohmic electrodes

Abstract

An object is to improve the aperture ratio of a semiconductor device. The semiconductor device includes a driver circuit portion and a display portion (also referred to as a pixel portion) over the same substrate. The driver circuit includes a channel-etched thin film transistor for driver circuit and a driver circuit wiring formed using metal. Source and drain electrodes of the thin film transistor for the driver circuit are formed using a metal. A channel layer of the thin film transistor for the driver circuit is formed using an oxide semiconductor. The display portion includes a bottom-contact thin film transistor for a pixel and a display portion wiring formed using an oxide conductor. Source and drain electrode layers of the thin film transistor for the pixel are formed using an oxide conductor. A semiconductor layer of the thin film transistor for the pixel is formed using an oxide semiconductor.

Claims

1. A semiconductor device comprising:

a pixel portion including a first transistor formed over a substrate; and

a driver circuit including a second transistor over the substrate,

wherein the first transistor comprises;

a first gate electrode layer over the substrate;

a gate insulating layer over the first gate electrode layer;

a first source electrode layer and a first drain electrode layer over the gate insulating layer;

a first oxide semiconductor layer over and in contact with part of the first source electrode layer and part of the first drain electrode layer and the gate insulating layer, the first oxide semiconductor layer having a peripheral portion whose thickness is smaller than a thickness of a portion other than the peripheral portion;

an oxide insulating layer over and in contact with the first oxide semiconductor layer; and

a pixel electrode layer over the oxide insulating layer,

wherein the second transistor comprises;

a second gate electrode layer over the substrate;

the gate insulating layer over the second gate electrode layer;

a second oxide semiconductor layer over the gate insulating layer,

a second source electrode layer and a second drain electrode layer over the second oxide semiconductor layer;

the oxide insulating layer over the second source electrode layer and the second drain electrode layer and in contact with part of the second oxide semiconductor layer,

wherein each of the first gate electrode layer, the gate insulating layer, the first oxide semiconductor layer, the first source electrode layer, the first drain electrode layer, the oxide insulating layer, and the pixel electrode layer has a light-transmitting property, and

wherein a material of the second source electrode layer and the second drain electrode layer is different from a material of the first source electrode layer and the first drain electrode layer.

2. The semiconductor device according to claim 1, wherein the second oxide semiconductor layer includes a channel formation region whose thickness is smaller than a thickness of a region overlapping with one of the second source electrode layer and the second drain electrode layer.

3. The semiconductor device according to claim 1, further comprising a conductive layer over the oxide insulating layer and overlapping with the second oxide semiconductor layer.

4. The semiconductor device according to claim 1, wherein the material of the second source electrode layer and the second drain electrode layer is a conductive material whose resistance is lower than the material of the first source electrode layer and the first drain electrode layer.

5. The semiconductor device according to claim 1, wherein the material of the second source electrode layer and the second drain electrode layer comprises an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W.

6. The semiconductor device according to claim 1, wherein each of the first source electrode layer, the first drain electrode layer, and the pixel electrode layer comprises indium oxide, an alloy of indium oxide and tin oxide, an alloy of indium oxide and zinc oxide, or zinc oxide.

7. The semiconductor device according to claim 1, further comprising a capacitor portion over the substrate,

wherein the capacitor portion includes a capacitor wiring and a capacitor electrode overlapping with the capacitor wiring, and

wherein each of the capacitor wiring and the capacitor electrode has a light-transmitting property.

8. The semiconductor device according to claim 1,

wherein the second oxide semiconductor layer includes a high-resistant drain region overlapping with one of the second source electrode layer and the second drain electrode layer,

wherein the high-resistant drain region has lower resistance than a channel formation region in the second oxide semiconductor layer.

9. A semiconductor device comprising:

a pixel portion including a first transistor formed over a substrate; and

a driver circuit including a second transistor over the substrate,

wherein the first transistor comprises;

a first gate electrode layer over the substrate;

a gate insulating layer over the first gate electrode layer;

a first source electrode layer and a first drain electrode layer over the gate insulating layer;

a first oxide semiconductor layer over and in contact with part of the first source electrode layer and part of the first drain electrode layer and the gate insulating layer, the first oxide semiconductor layer having a peripheral portion whose thickness is smaller than a thickness of a portion other than the peripheral portion;

an oxide insulating layer over and in contact with the first oxide semiconductor layer; and

a pixel electrode layer over the oxide insulating layer,

wherein the second transistor comprises;

a second gate electrode layer over the substrate;

the gate insulating layer over the second gate electrode layer;

a second oxide semiconductor layer over the gate insulating layer,

a second source electrode layer and a second drain electrode layer over the second oxide semiconductor layer;

the oxide insulating layer over the second source electrode layer and the second drain electrode layer and in contact with part of the second oxide semiconductor layer,

wherein each of the first gate electrode layer, the gate insulating layer, the first oxide semiconductor layer, the first source electrode layer, the first drain electrode layer, the oxide insulating layer, and the pixel electrode layer has a light-transmitting property,

wherein a material of the second source electrode layer and the second drain electrode layer is different from a material of the first source electrode layer and the first drain electrode layer,

wherein the second oxide semiconductor layer has a peripheral portion protruding outside edges of the second source electrode layer and the second drain electrode layer, and

wherein a thickness of the peripheral portion of the second oxide semiconductor layer is smaller than a thickness of a region overlapping with one of the second source electrode layer and the second drain electrode layer.

10. The semiconductor device according to claim 9, wherein the second oxide semiconductor layer includes a channel formation region whose thickness is smaller than the thickness of the region overlapping with one of the second source electrode layer and the second drain electrode layer.

11. The semiconductor device according to claim 10, further comprising a conductive layer provided over the channel formation region with at least the oxide insulating layer interposed therebetween.

12. The semiconductor device according to claim 9, wherein the material of the second source electrode layer and the second drain electrode layer is a conductive material whose resistance is lower than the material of the first source electrode layer and the first drain electrode layer.

13. The semiconductor device according to claim 9, wherein the material of the second source electrode layer and the second drain electrode layer comprises an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W.

14. The semiconductor device according to claim 9, wherein each of the first source electrode layer, the first drain electrode layer, and the pixel electrode layer comprises indium oxide, an alloy of indium oxide and tin oxide, an alloy of indium oxide and zinc oxide, or zinc oxide.

15. The semiconductor device according to claim 9, further comprising a capacitor portion over the substrate,

wherein the capacitor portion includes a capacitor wiring and a capacitor electrode overlapping with the capacitor wiring, and

wherein each of the capacitor wiring and the capacitor electrode has a light-transmitting property.

16. The semiconductor device according to claim 9,

wherein the second oxide semiconductor layer includes a high-resistant drain region overlapping with one of the second source electrode layer and the second drain electrode layer,

wherein the high-resistant drain region has lower resistance than a channel formation region in the second oxide semiconductor layer.

17. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first gate electrode layer and a second gate electrode layer over a substrate, wherein the first gate electrode layer is located in a pixel portion and the second gate electrode layer is located in a driver circuit portion;

forming a gate insulating layer over the first gate electrode layer and the second gate electrode layer;

forming a first source electrode layer and a first drain electrode layer over the gate insulating layer wherein part of the first source electrode layer and part of the first drain electrode layer overlap with the first gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer the first source electrode layer and the first drain electrode layer;

performing first heat treatment for dehydration or dehydrogenation on the oxide semiconductor layer;

forming a metal film over the oxide semiconductor layer without exposure of the oxide semiconductor layer to air after performing the first heat treatment;

forming a first resist mask and a second resist mask over the metal film, wherein the first resist mask is located over the first gate electrode layer, and the second resist mask has regions with different thicknesses and is located over the second gate electrode layer;

forming a first oxide semiconductor layer and a first metal film, which overlap with the first gate electrode layer, and a second oxide semiconductor layer, a second source electrode layer and a second drain electrode layer, which overlap with the second gate electrode layer, by etching the oxide semiconductor layer and the metal film with use of the first resist mask and the second resist mask;

etching the first metal film so that the first oxide semiconductor layer is exposed;

forming an oxide insulating layer in contact with part of the second oxide semiconductor layer and an upper surface and a side surface of the first oxide semiconductor layer;

performing second heat treatment after forming the oxide insulating layer; and

forming a pixel electrode layer electrically connected to one of the first drain electrode layer and the first source electrode layer and a conductive layer overlapping with the second oxide semiconductor layer over the oxide insulating layer.

18. The method for manufacturing a semiconductor device, according to claim 17, wherein the second source electrode layer and the second drain electrode layer comprise a film containing an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W.

19. The method for manufacturing a semiconductor device, according to claim 17, wherein each of the first source electrode layer, the first drain electrode layer, and the pixel electrode layer comprises indium oxide, an alloy of indium oxide and tin oxide, an alloy of indium oxide and zinc oxide, or zinc oxide.