TFT-LCD ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF
First Claim
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1. A thin film transistor liquid crystal display (TFT-LCD) array substrate, comprising:
- a plurality of gate lines and a plurality of data lines on a substrate, anda plurality of pixel regions defined by the gate lines and the data lines, each of the pixel regions comprising a pixel electrode and a thin film transistor serving as a switch element,wherein a gate electrode of the thin film transistor is connected with a corresponding gate line through a connection electrode, and the gate electrode is formed by a material layer different from that forming the gate lines.
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Abstract
A thin film transistor liquid crystal display (TFT-LCD) array substrate comprises a plurality of gate lines and a plurality of data lines on a substrate. A plurality of pixel regions are defined by the gate lines and the data lines. Each of the pixel regions comprises a pixel electrode and a thin film transistor serving as a switch element. The gate electrode of the thin film transistor is connected with a corresponding gate line through a connection electrode, and the gate electrode is formed by a material layer different from that forming the gate lines.
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Citations
27 Claims
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1. A thin film transistor liquid crystal display (TFT-LCD) array substrate, comprising:
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a plurality of gate lines and a plurality of data lines on a substrate, and a plurality of pixel regions defined by the gate lines and the data lines, each of the pixel regions comprising a pixel electrode and a thin film transistor serving as a switch element, wherein a gate electrode of the thin film transistor is connected with a corresponding gate line through a connection electrode, and the gate electrode is formed by a material layer different from that forming the gate lines. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A method of manufacturing a thin film transistor liquid crystal display (TFT-LCD) array substrate, comprising:
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Step 11 of depositing a gate metal film on a substrate and forming a gate line by patterning the gate metal film; Step 12 of sequentially depositing a first insulating layer and a structural layer for forming a gate electrode and a pixel electrode on the substrate after the Step 11, and forming the gate electrode and the pixel electrode by patterning the structural layer; Step 13 of sequentially depositing a second insulating layer, a semiconductor film and a doped semiconductor film on the substrate after the Step 12, and forming an active layer and a first via hole, a second via hole and a third via hole provided in the second insulating layer by patterning the stack of the above layers, wherein the active layer comprises a semiconductor layer and a doped semiconductor layer and is positioned on the gate electrode, the first via hole is positioned at the pixel electrode, the second via hole is positioned at the gate electrode and the third via hole is positioned at the gate line; Step 14 of depositing a source/drain metal film on the substrate after the Step 13, and forming a data line, a drain electrode, a source electrode and a connection electrode by patterning the source/drain metal film, wherein the source electrode is positioned on the active layer and connected with the data line, the drain electrode is positioned on the active layer and connected with the pixel electrode through the first via hole, one end of the connection electrode is connected with the gate electrode through the second via hole and the other end thereof is connected with the gate line through the third via hole; and Step 15 of depositing a third insulating layer on the substrate after the Step 14. - View Dependent Claims (19, 20, 21, 22, 23, 24)
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25. A method of manufacturing a thin film transistor liquid crystal display (TFT-LCD) array substrate, comprising:
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Step 21 of depositing a light-blocking film on a substrate and forming a blocking layer by patterning the light-blocking film; Step 22 of depositing a semiconductor film, a doped semiconductor film and a source/drain metal film on the substrate after the Step 21, and forming an active layer, a data line, a source electrode and a drain electrode by patterning the stack of the above layers; Step 23 of depositing a first insulating layer on the substrate after the Step 22, and forming a first via hole by patterning the first insulating layer, wherein the first via hole is positioned at the drain electrode; and Step 24 of depositing a transparent conductive film and a gate metal film on the substrate after the Step 23, and forming a gate electrode, a pixel electrode, a gate line and a connection electrode by patterning the stack of the transparent conductive film and the gate metal film, wherein the pixel electrode is connected with the drain electrode through the first via hole, the gate electrode formed by the transparent conductive film is positioned over the blocking layer, and one end of the connection electrode is provided on and contacts the gate electrode and the other end thereof is connected with the gate line. - View Dependent Claims (26, 27)
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Specification