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MULTI-CHIP PACKAGE STRUCTURE SUITABLE FOR MULTI-PROCESSOR SYSTEM HAVING MEMORY LINK ARCHITECTURE

  • US 20110013353A1
  • Filed: 03/03/2010
  • Published: 01/20/2011
  • Est. Priority Date: 07/14/2009
  • Status: Abandoned Application
First Claim
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1. A multi-chip package structure comprising:

  • a first package includinga first circuit board including a lower surface including a first circuit pattern thereon and an upper surface, opposite the lower surface, including an upper pad layer thereon, andat least one processor chip mounted on the lower surface of the first circuit board, anda second package, mounted on the first package, includinga second circuit board including an upper surface including a second circuit pattern thereon and a lower surface, opposite the upper surface, including a lower pad layer thereon electrically connected to the upper pad layer of the first circuit board, andat least one memory chip laminated and molded on the upper surface of the second package.

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