SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR REDUCING A RATE OF DATA TRANSFER TO AT LEAST A PORTION OF MEMORY

• US 20110016239A1
• Filed: 07/20/2009
• Published: 01/20/2011
• Est. Priority Date: 07/20/2009
• Status: Active Grant

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: LSI Corporation (Broadcom, Inc.)
• Inventors: Stenfort, Ross John
• Granted Patent: US 8,516,166 B2
• Time in Patent Office: Days
• US Class Current: 710/34
• CPC Class Codes: G06F 3/0616 in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
• CPC Class Codes: G06F 3/0655 Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
• CPC Class Codes: G06F 3/0673 Single storage device
• CPC Class Codes: G11C 16/08 Address circuits; Decoders; Word-line control circuits
• CPC Class Codes: G11C 7/22 Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management

Abstract

A system, method, and computer program product are provided for reducing a rate of data transfer to at least a portion of memory. In operation, a rate of degradation of at least a portion of memory associated with a drive is determined. Furthermore, a rate of data transfer to the at least a portion of the memory is reduced, based on the determined rate of degradation.

Claims

1. A method, comprising:

determining a rate of degradation of at least a portion of memory associated with a drive; and

reducing a rate of data transfer to the at least a portion of the memory, based on the determined rate of degradation.

2. The method of claim 1, wherein reducing the rate of data transfer includes reducing a number of actions performed with respect to the at least a portion of the memory.

3. The method of claim 2, wherein the actions include writing to the at least a portion of the memory.

4. The method of claim 2, wherein the actions include reading from the at least a portion of the memory.

5. The method of claim 1, wherein an interface associated with the drive reduces the rate of the data transfer to the at least a portion of the memory.

6. The method of claim 5, wherein the interface includes a Serial ATA (SATA) interface.

7. The method of claim 5, wherein the interface includes a Serial Attached SCSI (SAS) interface.

8. The method of claim 5, wherein the interface includes a PCI Express interface.

9. The method of claim 5, wherein the interface includes a USB interface.

10. The method of claim 1, wherein reducing the rate of data transfer to the at least a portion of the memory includes inserting one or more gaps in the data.

11. The method of claim 10, wherein the one or more gaps include a time delay.

12. The method of claim 1, wherein reducing the rate of data transfer to the at least a portion of the memory includes reducing a number of credits distributed to facilitate data transfer.

13. The method of claim 1, wherein reducing the rate of data transfer to the at least a portion of the memory includes rejecting one or more connection requests between a host device and the drive.

14. The method of claim 1, wherein reducing the rate of data transfer to the at least a portion of the memory includes inserting one or more align primitives in the data.

15. The method of claim 1, wherein reducing the rate of data transfer to the at least a portion of the memory includes limiting a connection time between the drive and a host device.

16. The method of claim 1, wherein reducing the rate of data transfer to the at least a portion of the memory includes closing a connection between the drive and a host device without sending or receiving all available information.

17. The method of claim 1, wherein reducing the rate of data transfer to the at least a portion of the memory includes rate matching one or more connections.

18. The method of claim 1, wherein reducing the rate of data transfer to the at least a portion of the memory includes delaying transfer ready frames.

19. The method of claim 1, wherein reducing the rate of data transfer to the at least a portion of the memory includes reducing a speed of a negotiated link.

20. The method of claim 1, wherein reducing the rate of data transfer to the at least a portion of the memory is performed based on a mode.

21. The method of claim 20, wherein the mode is a result of the determined rate of degradation.

22. The method of claim 1, wherein an amount that the rate of data transfer is reduced is configurable.

23. The method of claim 1, wherein an amount that the rate of data transfer is reduced is fixed.

24. A computer program product embodied on a computer readable medium, comprising:

computer code for determining a rate of degradation of at least a portion of memory associated with a drive; and

computer code for reducing a rate of data transfer to the at least a portion of the memory, based on the determined rate of degradation.

25. An apparatus, comprising:

a controller for determining a rate of degradation of at least a portion of memory associated with a drive; and

an interface for reducing a rate of data transfer to the at least a portion of the memory, based on the determined rate of degradation.