Method of Producing Covers for Electronics

• US 20110018160A1
• Filed: 07/24/2009
• Published: 01/27/2011
• Est. Priority Date: 07/24/2009
• Status: Abandoned Application

• Current Assignee: Frank J. Ziberna
• Original Assignee: Frank J. Ziberna
• Inventors: ZIBERNA, Frank J.
• Application Number:
  US12/509,337
• Publication Number:
  US 20110018160A1
• Time in Patent Office: Days
• US Class Current: 264/129
• CPC Class Codes: H01L 21/4817 for containers, e.g. caps H01L21/4871 takes precedence
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/16152 Cap comprising a cavity for hosting the device, e.g. U-shaped cap
• CPC Class Codes: H01L 2924/1617 Cavity coating

Abstract

A process of making parts for electronics including forming a plurality of covers in a cover group where the covers are connected by interspaced portions. An electrically conductive material may be applied to the bottom side of the group for shielding electro-magnetic interference, electrostatic discharge, radio frequency interference, or other unwanted exterior disturbance, discharge, or interference. The covers are separated from the cover group.

Claims

1. A process of making covers for electronics, comprising the steps of:

forming a cover group having a plurality of covers where the covers are connected by interspaced portions; and

separating the covers from the group.

2. The process of claim 1, comprising the step of, after the forming step and before the separating step, applying an electrically conductive material to the one side of the group.

3. The process of claim 2, wherein the step of applying is further defined in that the electrically conductive material is applied to the inside surface of the cover.

4. The process of claim 3, wherein the step of forming is further defined in that each cover has a maximum dimension of 21 millimeters, where the dimension is defined by the furthest distance between two points on the external surface of the cover.

5. The process of claim 3, wherein the step of forming is further defined in that each cover has a minimum dimension of 0.1 millimeters, where the dimension is defined by the furthest distance between two points on the external surface of the cover

6. The process of claim 1, wherein the step of separating comprises the step of separating the covers from the group over packaging so that each separated cover lands in a predefined location in the packaging.

7. The process of claim 6, further comprising the step of taking at least one of the covers from the packaging and placing it on or over one or more electronic components.

8. The process of claim 7, wherein the step of taking is further defined in that a robot takes one of the covers from the packaging and places the cover over one or more electronic components.

9. The process of claim 2, wherein the step of applying is further defined in that the electrically conductive material is applied by vapor deposition.

10. The process of claim 2, wherein the step of applying is further defined in that the electrically conductive material is applied by plating.

11. The process of claim 1, further comprising the step of sealing a cover over one or more electronic components.

12. The process of claim 1, wherein the step of separating comprises the step of separating all of the cover substantially simultaneously from the interspaced portions.

13. The process of claim 1, wherein the step of forming is further defined in that the covers are formed spaced apart a first distance in rows;

and

wherein the step of separating comprises the steps of

providing a tape pocket packaging with pockets spaced apart a second distance in a row so that when the covers are separated from the interspaced areas using a separating tool the covers will be aligned with the pockets and received therein;

directing the separated covers to corresponding pockets using the separating tool.

14. A process of making covers for electronics, comprising the steps of:

forming a plurality of covers in a cover group where the covers are connected by interspaced portions;

applying an electrically conductive material to the one side of the group; and

separating the covers from the group.

15. The process of claim 14, wherein the step of forming comprises the step of forming a plurality of covers each having an inner floor opposite an open side and surrounded by sidewalls, the inner floor at least partially occupies the geometric plane formed by the interspaced portions;

and

the step of applying is further defined in that the electrically conductive material is applied to the inner floor of the covers.

16. The process of claim 14, wherein the step of separating comprises the step of separating the covers from the group over packaging so that each separated cover lands within its predefined location in the packaging.

17. The process of claim 16, comprising the step of taking at least one of the covers from the packaging and placing the at least one of the covers on a MEMS device.

18. The process of claim 14, wherein the step of forming comprises the step of:

forming a plurality of covers each having an inner floor, the inner floor having an open area; and

,

placing an insert over the open area.

19. The process of claim 14, wherein the step of separating comprises the step of directing the separated covers to predefined locations in a packaging using a separating tool.

20. A process of making parts for electronics, comprising the steps of:

forming a plurality of parts in a group where the parts are connected by interspaced portions;

applying an electrically conductive material to the bottom side of the group; and

separating the parts from the group.