Semiconductor Device and Method of Fabricating the Same
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Accused Products
Abstract
Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a first interconnection disposed on a substrate. The interconnection includes a first silicon interconnection region and a first metal interconnection region sequentially stacked on the substrate. A second interconnection includes a second silicon interconnection region and a second metal interconnection region that are stacked sequentially. The second silicon interconnection region has a lower resistivity than the first silicon interconnection region.
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Citations
36 Claims
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1-14. -14. (canceled)
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15-22. -22. (canceled)
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23. A semiconductor device comprising:
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a first interconnection including a first silicon interconnection region and a first metal interconnection region stacked sequentially on a substrate; and a second interconnection including a second silicon interconnection region and a second metal interconnection region stacked sequentially on the substrate, wherein the second silicon interconnection region is disposed at substantially the same level as the first silicon interconnection region and has a lower resistivity than the first silicon interconnection region. - View Dependent Claims (24, 25, 26, 27)
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28. A semiconductor device comprising:
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a semiconductor substrate having first and second circuit regions; a first MOS transistor disposed on the first circuit region of the semiconductor substrate and including a first gate structure and first source and drain regions; a contact region electrically connected to one of the first source and drain regions; a first silicon interconnection connected to the contact region and having a higher resistivity than the contact region; a first metal interconnection region disposed on the contact region and the first silicon interconnection region; a second silicon interconnection region disposed on the second circuit region of the semiconductor substrate and having a lower resistivity than the first silicon interconnection region; and a second metal interconnection region disposed on the second silicon interconnection region. - View Dependent Claims (29, 30, 31, 32, 33, 34, 35, 36)
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Specification