COMPACT DECODING OF PUNCTURED CODES

• US 20110022927A1
• Filed: 09/03/2009
• Published: 01/27/2011
• Est. Priority Date: 07/21/2009
• Status: Active Grant

• Current Assignee: Ramot at Tel Aviv University Limited (Tel Aviv University)
• Original Assignee: Ramot at Tel Aviv University Limited (Tel Aviv University)
• Inventors: Litsyn, Simon, Alrod, Idan, Sharon, Eran
• Granted Patent: US 9,397,699 B2
• Time in Patent Office: Days
• US Class Current: 714/763
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: H03M 13/1105 Decoding
• CPC Class Codes: H03M 13/1157 Low-density generator matrices [LDGM]
• CPC Class Codes: H03M 13/1174 Parity-check or generator matrices built from sub-matrices representing known block codes such as, e.g. Hamming codes, e.g. generalized LDPC codes
• CPC Class Codes: H03M 13/3707 Adaptive decoding and hybrid decoding, e.g. decoding methods or techniques providing more than one decoding algorithm for one code
• CPC Class Codes: H03M 13/6306 Error control coding in combination with Automatic Repeat reQuest [ARQ] and diversity transmission, e.g. coding schemes for the multiple transmission of the same information or the transmission of incremental redundancy H03M13/3761, H03M13/3769 and H03M13/635 take precedence
• CPC Class Codes: H03M 13/6362 by puncturing
• CPC Class Codes: H03M 13/6502 Reduction of hardware complexity or efficient processing

Abstract

k information bits are encoded according to a code with which is associated a parity check matrix H that has n columns. The entire resulting codeword is stored in a storage medium. At least n′<n bits of a representation of the codeword are read from the storage medium and an attempt is made to decode only the n′ bits using a matrix H′ that has fewer columns than H. Typically, H has m=n−k rows and H′ has m−(n−n′) rows and n′ columns. If the attempt fails, one or more additional bits are read from the storage medium, if necessary, and are combined with the n′ bits, and the decoding attempt is repeated using a matrix H′″ that has more columns than H′.

Claims

1. A method of storing and retrieving k information bits, comprising:

(a) encoding the information bits according to a code with which is associated a parity check matrix H that has n columns, thereby producing a codeword of n bits;

(b) storing the entire codeword in a storage medium;

(c) reading at least n′

<

n bits of a representation of the codeword from the storage medium; and

(d) attempting to decode only the n′

bits of the representation of the codeword using a matrix H′

that has fewer columns than H.

2. The method of claim 1, wherein the code is a block code.

3. The method of claim 1, wherein the decoding includes exchanging messages between the rows of H′

and the columns of H′

.

4. The method of claim 1, wherein H has m=n−

k rows and wherein H′

has m′

=m−

(n−

n′

) rows and n′

columns.

5. The method of claim 4, further comprising:

(e) deriving H′

from H.

6. The method of claim 5, wherein the deriving of H′

from H is effected by steps including performing Gaussian elimination on H.

7. The method of claim 6, wherein the Gaussian elimination is performed to set equal to zero elements 1 through m′

of the columns of H that correspond to the bits of the representation of the codeword that are not read from the storage medium, thereby producing a matrix H″

, H′

then being rows 1 through m′

of H″

without the columns that correspond to the bits of the representation of the codeword that are not read from the storage medium.

8. The method of claim 1, further comprising:

(e) if the attempting to decode only the n′

bits of the representation of the codeword using H′

fails;

attempting to decode the n′

bits of the representation of the codeword together with at least one more bit of the representation of the codeword, using a matrix H′

″

that has more columns than H′

.

9. The method of claim 8, further comprising:

(f) if the attempting to decode only the n′

bits of the representation of the codeword using H′

fails;

reading the at least one more bit of the representation of the codeword from the storage medium.

10. The method of claim 8, wherein, if the attempting to decode only the n′

bits of the representation of the codeword using H′

fails, H′

″

is identical to H, and the attempt to decode the n′

bits of the representation of the codeword together with the at least one more bit of the representation of the codeword is an attempt to decode all n bits of the representation of the codeword using H.

11. The method of claim 8, wherein n′

<

n−

1, and wherein, if the attempting to decode only the n′

bits of the representation of the codeword using H′

fails, H′

″

has fewer columns than H, and the attempt to decode the n′

bits of the representation of the codeword together with the at least one more bit of the representation of the codeword is an attempt to decode fewer than all n bits of the representation of the codeword using H′

″

.

12. A memory device, comprising:

(a) a memory; and

(b) a controller for storing information bits in the memory and for recovering the information bits from the memory, the controller including;

(i) an encoder for encoding the information bits according to a code with which is associated a parity check matrix H that has n columns, thereby producing a codeword of n bits,

(ii) circuitry for storing the entire codeword in the memory and for reading at least n′

<

n bits of a representation of the codeword from the memory, and

(iii) a decoder for attempting to decode only the n′

<

n bits of the representation of the codeword, the decoding being effected using a matrix H′

that has fewer columns than H.

13. A system comprising:

(a) a first memory; and

(b) a host of the first memory including;

(i) a second memory having stored therein code for managing the first memory by steps including;

(A) encoding information bits according to a code with which is associated a parity check matrix H that has n columns, thereby producing a codeword of n bits,

(B) storing the entire codeword in the first memory,

(C) reading at least n′

<

n bits of a representation of the codeword from the first memory, and

(D) attempting to decode only the n′

bits of the representation of the codeword using a matrix H′

that has fewer columns than H, and

(ii) a processor for executing the code.

14. The system of claim 13, wherein the code for managing the first memory also includes code for deriving H′

from H.

15. A computer-readable storage medium having embodied thereon computer-readable code for managing a memory, the computer-readable code comprising:

(a) program code for encoding information bits according to a code with which is associated a parity check matrix H that has n columns, thereby producing a codeword of n bits;

(b) program code for storing the entire codeword in the memory;

(c) program code for reading at least n′

<

n bits of a representation of the codeword from the memory; and

(d) program code for attempting to decode only the n′

bits of the representation of the codeword using a matrix H′

that has fewer columns than H.

16. The computer-readable storage medium of claim 15, wherein the computer-readable code further comprises:

(e) program code for deriving H′

from H.

17. A method of recovering k information bits that have been encoded as a codeword of n bits according to a code with which is associated a parity check matrix H that has n columns, the entire codeword having been stored in a storage medium, the method comprising:

(a) reading at least n′

<

n bits of a representation of the codeword from the storage medium; and

(b) attempting to decode only the n′

bits of the representation of the codeword using a matrix H′

that has fewer columns than H.

18. The method of claim 17, wherein the code is a block code.

19. The method of claim 17, wherein the decoding includes exchanging messages between the rows of H′

and the columns of H′

.

20. The method of claim 17, wherein H has m=n−

k rows and wherein H′

has m′

=m−

(n−

n′

) rows and n′

columns.

21. The method of claim 20, further comprising:

(e) deriving H′

from H.

22. The method of claim 21, wherein the deriving of H′

from H is effected by steps including performing Gaussian elimination on H.

23. The method of claim 22, wherein the Gaussian elimination is performed to set equal to zero elements 1 through m′

of the columns of H that correspond to the bits of the representation of the codeword that are not read from the storage medium, thereby producing a matrix H″

, H′

then being rows 1 through m′

of H″

without the columns that correspond to the bits of the representation of the codeword that are not read from the storage medium.

24. The method of claim 17, further comprising:

(c) if the attempting to decode only the n′

bits of the representation of the codeword using H′

fails;

attempting to decode the n′

bits of the representation of the codeword together with at least one more bit of the representation of the codeword, using a matrix H′

″

that has more columns than H′

.

25. The method of claim 24, further comprising:

(d) if the attempting to decode only the n′

bits of the representation of the codeword using H′

fails;

reading the at least one more bit of the representation of the codeword from the storage medium.

26. The method of claim 24, wherein, if the attempting to decode only the n′

bits of the representation of the codeword using H′

fails, H′

″

is identical to H, and the attempt to decode the n′

bits of the representation of the codeword together with the at least one more bit of the representation of the codeword is an attempt to decode all n bits of the representation of the codeword using H.

27. The method of claim 24, wherein n′

<

n−

1, and wherein, if the attempting to decode only the n′

bits of the representation of the codeword using H′

fails, H′

″

has fewer columns than H, and the attempt to decode the n′

bits of the representation of the codeword together with the at least one more bit of the representation of the codeword is an attempt to decode fewer than all n bits of the representation of the codeword using H′

″

.

28. A decoder for decoding a codeword of n bits, the codeword having been produced by encoding information bits according to a code with which is associated a parity check matrix that has n columns, the entire codeword having been stored in a storage medium, at least n′

<

n bits of a representation of the codeword having been read from the storage medium, the decoder comprising;

(a) a decoding module for attempting to decode only the n′

bits of the representation of the codeword using a matrix H′

that has fewer columns than H.

29. The decoder of claim 28, further comprising:

(b) a feedback module for requesting at least one more bit of the representation of the codeword in case the decoding fails.