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GENERATING INTEGRATED CIRCUIT FLOORPLAN LAYOUTS

  • US 20110023000A1
  • Filed: 07/24/2009
  • Published: 01/27/2011
  • Est. Priority Date: 07/24/2009
  • Status: Active Grant
First Claim
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1. A computer-implemented method of designing an integrated circuit (IC), the method comprising:

  • (A) defining a plurality of functional blocks for the IC, wherein at least one functional block of said plurality is an empty functional block or a functional block that is only partially rendered in circuit elements;

    (B) specifying connectivity and one or more constraints for said plurality of functional blocks; and

    (C) performing placement and routing processing for said plurality of functional blocks based on the specified connectivity and the specified one or more constraints to generate a layout for the IC.

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