FRAME RATE CONVERTER AND DISPLAY APPARATUS EQUIPPED THEREWITH

• US 20110025910A1
• Filed: 07/30/2010
• Published: 02/03/2011
• Est. Priority Date: 07/31/2009
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Sanyo Semiconductor Company Limited (ON Semiconductor Corporation), Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: FURUKAWA, Riichi, Otowa, Satoshi
• Granted Patent: US 8,451,373 B2
• Time in Patent Office: Days
• US Class Current: 348/441
• CPC Class Codes: H04N 7/0132 the field or frame frequency of the incoming video signal being multiplied by a positive integer, e.g. for flicker reduction

Abstract

An input unit writes, into a memory unit, frames successively input from the outside. An interpolated frame generating unit reads multiple original frames from the memory unit, generates an interpolated frame between the original frames, and writes the interpolated frame into the memory unit. An output unit retrieves original frames and an interpolated frame from the memory unit and outputs to the outside the frames in the order in which the frames are to be displayed. The input unit, interpolated frame generating unit, and output unit operate in parallel to perform pipeline processing. Operation timing of each of the input unit and the interpolated frame generating unit is determined so that the timing at which the input unit writes an original frame into the memory unit differs from the timing at which the interpolated frame generating unit writes an interpolated frame into the memory unit.

Claims

1. A frame rate converter, comprising:

an input unit configured to write, into a memory unit, frames successively input from the outside;

an interpolated frame generating unit configured to retrieve a plurality of original frames from the memory unit, generate an interpolated frame between the original frames, and write the interpolated frame into the memory unit; and

an output unit configured to retrieve original frames and an interpolated frame from the memory unit and output to the outside the frames in the order in which the frames are to be displayed, wherein;

the input unit, the interpolated frame generating unit, and the output unit operate in parallel to perform pipeline processing; and

operation timing of each of the input unit and the interpolated frame generating unit is determined so that the timing at which the input unit writes an original frame into the memory unit differs from the timing at which the interpolated frame generating unit writes an interpolated frame into the memory unit.

2. The frame rate converter of claim 1, wherein the input unit, the interpolated frame generating unit, and the output unit operate with a period shorter than the period with which a frame to be processed is input to the input unit.

3. The frame rate converter of claim 2, wherein, within the period between the termination of the input period of a target frame, in which the target frame is input to the input unit and written into the memory unit, and the initiation of the input period of the next frame, the interpolated frame generating unit completes the processing of retrieving at least the target frame, generating the interpolated frame with reference to at least the target frame, and writing the interpolated frame.

4. The frame rate converter of claim 2, wherein, longer than the period between the termination of the input period of a target frame, in which the target frame is input to the input unit and written into the memory unit, and the initiation of the input period of the next frame, the interpolated frame generating unit performs an interpolated frame generating process of retrieving at least the target frame, generating the interpolated frame with reference to at least the target frame, and writing the interpolated frame.

5. The frame rate converter of claim 4, wherein the interpolated frame generating unit suspends the interpolated frame generating process during the input period of the next frame.

6. The frame rate converter of claim 1, wherein the interpolated frame generating unit generates a plurality of interpolated frames in stages between the original frames.

7. The frame rate converter of claim 1, wherein the number of frames to be input to the input unit is increased by duplication before the frames are input to the frame rate converter.

8. The frame rate converter of claim 7, wherein the number of frames input to the input unit equals the number of frames output from the output unit.

9. A display apparatus, comprising:

the frame rate converter of claim 1; and

a display unit configured to display an image of which the frame rate has been converted by the frame rate converter.