Semiconductor Component and Method of Manufacture
3 Assignments
0 Petitions
Accused Products
Abstract
A semiconductor component that includes an integrated passive device and method for manufacturing the semiconductor component. Vertically integrated passive devices are manufactured above a substrate. In accordance with one embodiment, a resistor is manufactured in a first level above a substrate, a capacitor is manufactured in a second level that is vertically above the first level, and a copper inductor is manufactured in a third level that is vertically above the second level. The capacitor has aluminum plates. In accordance with another embodiment, a resistor is manufactured in a first level above a substrate, a copper inductor is manufactured in a second level that is vertically above the first level, and a capacitor is manufactured in a third level that is vertically above the second level. The capacitor may have aluminum plates or a portion of the copper inductor may serve as one of its plates.
24 Citations
30 Claims
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12. A method for manufacturing a semiconductor component, comprising:
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providing a substrate; forming a first passive circuit element at a first level above the substrate, wherein forming the first passive circuit element includes forming an inductor; forming a second passive circuit element at a second level above the first level, wherein at least one of the first or second passive circuit elements comprises a damascene structure, and wherein forming the second passive circuit element includes forming a capacitor; and forming a third passive circuit element from or above the substrate including forming a resistor. - View Dependent Claims (13, 14, 15, 16, 17)
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20. A method for manufacturing a semiconductor component, comprising:
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forming an inductor using a damascene process, the inductor formed in a first vertical planar region; and forming a capacitor in a second vertical planar region, the capacitor having a first conductor separated from a second conductor by a dielectric material, wherein the first vertical planar region is below the second vertical planar region. - View Dependent Claims (21, 22, 23)
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Specification