COMPUTING DEVICE BOOTING UTILIZING DISPERSED STORAGE

• US 20110029765A1
• Filed: 04/06/2010
• Published: 02/03/2011
• Est. Priority Date: 07/31/2009
• Status: Active Grant

• Current Assignee: Pure Storage, Inc.
• Original Assignee: Cleversafe Incorporated (International Business Machines Corporation)
• Inventors: Markison, Timothy W., Grube, Gary W.
• Granted Patent: US 8,352,719 B2
• Time in Patent Office: Days
• US Class Current: 713/2
• CPC Class Codes: G06F 11/0727 in a storage system, e.g. in a DASD or network based storage system drivers for digital recording or reproducing units G06F3/06; circuits for error detection or correction within digital recording or reproducing units G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097
• CPC Class Codes: G06F 11/10 Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
• CPC Class Codes: G06F 11/1016 Error in accessing a memory location, i.e. addressing error
• CPC Class Codes: G06F 11/1076 Parity data used in redundant arrays of independent storages, e.g. in RAID systems
• CPC Class Codes: G06F 11/1092 Rebuilding, e.g. when physically replacing a failing disk
• CPC Class Codes: G06F 11/14 Error detection or correction of the data by redundancy in operation G06F11/16 takes precedence
• CPC Class Codes: G06F 11/1666 where the redundant component is memory or memory area
• CPC Class Codes: G06F 12/14 Protection against unauthorised use of memory or access to memory
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/067 Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
• CPC Class Codes: G06F 9/30145 Instruction analysis, e.g. decoding, instruction word fields
• CPC Class Codes: G06F 9/4401 Bootstrapping security arrangements therefor G06F21/57

Abstract

A computing device boot-up method begins by a processing module detecting a boot-up of the computing device. The method continues with the processing module addressing a distributed basic input/output system (BIOS) memory to retrieve a plurality of error coded BIOS data slices. The method continues with the processing module reconstructing BIOS data from the plurality of error coded BIOS data slices using an error coding dispersal function. The method continues with the computing device booting up in accordance with the BIOS data.

Claims

1. A method for booting-up a computing device, the method comprises:

detecting, by a processing module, a boot-up of the computing device;

addressing, by the processing module, a distributed basic input/output system (BIOS) memory to retrieve a plurality of error coded BIOS data slices;

reconstructing, by the processing module, BIOS data from the plurality of error coded BIOS data slices using an error coding dispersal function; and

booting up the computing device in accordance with the BIOS data.

2. The method of claim 1, wherein the addressing of the distributed BIOS memory further comprises:

executing, by the processing module, a graphical user interface (GUI) boot loader;

facilitating, by the processing module, execution of a GUI function;

receiving, via the GUI function, account information; and

determining, by the processing module, the addressing of the distributed BIOS memory based on the account information.

3. The method of claim 2, wherein the determining of the addressing of the distributed BIOS memory further comprises:

the account information including at least one of;

a user identifier (ID);

a vault identifier (ID);

a password;

a password hash; and

determining the addressing of the distributed BIOS memory based on the at least one of the user ID, the vault ID, the password, and the password hash, wherein the distributed BIOS memory comprises at least one of;

a local memory address;

a local area network (LAN) memory address; and

a wide area network (WAN) memory address.

4. The method of claim 1, wherein the booting up the computing device comprises:

generating, by the processing module, BIOS instructions based on the BIOS data;

executing, by the processing module, the BIOS instructions, wherein the BIOS instructions includes at least one of;

computing device initialization instructions;

computing device test instructions; and

operating system boot-up instructions.

5. The method of claim 4, wherein the executing of the BIOS instructions further comprises:

identifying an operating system (OS);

addressing a distributed OS memory to retrieve a plurality of error coded OS data slices; and

reconstructing an OS data segment from the plurality of error coded OS data slices using a second error coding dispersal function.

6. The method of claim 4, wherein executing of the operating system boot-up instructions comprises:

identifying an operating system (OS);

addressing a distributed OS memory to retrieve a first plurality of error coded OS data slices;

reconstructing a first OS data segment from the first plurality of error coded OS data slices using a second error coding dispersal function;

determining whether to retrieve a second plurality of error coded OS data slices;

when the second plurality of error coded OS data slices is to be retrieved, addressing the distributed OS memory to retrieve the second plurality of error coded OS data slices; and

reconstructing a second OS data segment from the second plurality of error coded OS data slices using the second error coding dispersal function.

7. The method of claim 1, wherein the addressing of the distributed BIOS memory further comprises:

determining whether a BIOS data slice of the plurality of error coded BIOS data slices has a slice error;

when the BIOS data slice has the slice error, reconstructing the BIOS data from other BIOS data slices of the plurality of error coded BIOS data slices using the error coding dispersal function to produce reconstructed BIOS data;

rebuilding the plurality of error coded BIOS data slices from the reconstructed BIOS data to produce a rebuilt plurality of error coded BIOS data slices; and

facilitating storage of the rebuilt plurality of error coded BIOS data slices.

8. A computing device comprises:

a processing module;

a memory controller; and

main memory, wherein, when the computing device is being booted up;

the processing module addresses, via the memory controller, a distributed basic input/output system (BIOS) memory to retrieve a plurality of error coded BIOS data slices;

at least one of the memory controller and the processing module reconstructs BIOS data from the plurality of error coded BIOS data slices using an error coding dispersal function;

the main memory stores the BIOS data; and

booting-up the computing device in accordance with the BIOS data.

9. The computing device of claim 8 further comprises:

a plurality of read-only memories (ROM) that function as the distributed BIOS memory.

10. The computing device of claim 9, wherein the plurality of read-only memories operably couple to the memory controller via at least one of:

an input output (IO) controller; and

an input output (IO) interface.

11. The computing device of claim 8, wherein the processing module further functions to address the distributed BIOS memory by:

executing a graphical user interface (GUI) boot loader;

facilitating execution of a GUI function;

receiving, via the GUI function, account information; and

determining the addressing of the distributed BIOS memory based on the account information.

12. The computing device of claim 11, wherein the processing module further functions to determine the addressing of the distributed BIOS memory by:

the account information including at least one of;

a user identifier (ID);

a vault identifier (ID);

a password;

a password hash; and

determining the addressing of the distributed BIOS memory based on the at least one of the user ID, the vault ID, the password, and the password hash, wherein the distributed BIOS memory comprises at least one of;

a local memory address;

a local area network (LAN) memory address; and

a wide area network (WAN) memory address.

13. The computing device of claim 8, wherein the processing module boots-up the computing device by:

generating BIOS instructions based on the BIOS data;

executing the BIOS instructions, wherein the BIOS instructions includes at least one of;

computing device initialization instructions;

computing device test instructions; and

operating system boot-up instructions.

14. The computing device of claim 13, wherein the processing module executing the operating system boot-up instructions comprises:

identifying an operating system (OS);

addressing, via the memory controller, a distributed OS memory to retrieve a plurality of error coded OS data slices; and

reconstructing an OS data segment from the plurality of error coded OS data slices using a second error coding dispersal function.

15. The computing device of claim 13, wherein the processing module executing the operating system boot-up instructions comprises:

identifying an operating system (OS);

addressing, via the memory controller, a distributed OS memory to retrieve a first plurality of error coded OS data slices;

reconstructing a first OS data segment from the first plurality of error coded OS data slices using a second error coding dispersal function;

determining whether to retrieve a second plurality of error coded OS data slices;

when the second plurality of error coded OS data slices is to be retrieved, addressing, via the memory controller, the distributed OS memory to retrieve the second plurality of error coded OS data slices; and

reconstructing a second OS data segment from the second plurality of error coded OS data slices using the second error coding dispersal function.

16. The computing device of claim 8, wherein the processing module addressing the distributed BIOS memory further comprises:

determining whether a BIOS data slice of the plurality of error coded BIOS data slices has a slice error;

when the BIOS data slice has the slice error, reconstructing BIOS data from other BIOS data slices of the plurality of error coded BIOS data slices using the error coding dispersal function to produce reconstructed BIOS data;

rebuilding the plurality of error coded BIOS data slices from the reconstructed BIOS data to produce a rebuilt plurality of error coded BIOS data slices; and

facilitating storage, via the memory controller, of the rebuilt plurality of error coded BIOS data slices.

17. A basic input/output system (BIOS) memory comprises:

a plurality of memory devices arranged in accordance with a pillar width of an error coded dispersal function, wherein the plurality of memory devices stores, in accordance with the error coded dispersal function, error coded BIOS data slices of BIOS data and wherein, when addressed, the plurality of memory devices outputs the error coded BIOS data slices in accordance with the error coded dispersal function.

18. The BIOS memory of claim 17, wherein a memory device of the plurality of memory devices further comprises one or more of:

a read only memory (ROM) device;

an erasable programmable read only memory (EPROM) device;

an electronically erasable programmable read only memory (EEPROM) device;

a nonvolatile random access memory (NVRAM);

a flash memory device;

a compact disc read only memory (CD-ROM) device; and

a digital video disc read only memory (DVD-ROM) device.

19. The BIOS memory of claim 17, wherein the error coded dispersal function comprises at least one of:

forward error correction function;

an information dispersal algorithm (IDA);

turbo coding;

convolutional coding;

trellis coding; and

Reed-Solomon coding.

20. The BIOS memory of claim 17, wherein the plurality of memory devices further comprises:

a plurality of ROM memory devices for inclusion in a computing core.

21. The BIOS memory of claim 17, wherein the plurality of memory devices further comprises at least one of:

a plurality of local area network (LAN) memory devices; and

a plurality of wide area network (WAN) memory devices.