SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• US 20110031493A1
• Filed: 08/02/2010
• Published: 02/10/2011
• Est. Priority Date: 08/07/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei, OIKAWA, Yoshiaki, MARUYAMA, Hotaka, SAKAKURA, Masayuki, SAKATA, Junichiro, OKAZAKI, Kenichi
• Granted Patent: US 8,502,220 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 21/385 using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1251 comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/0041 characterised by field-effect operation

Abstract

An object is to improve reliability of a semiconductor device. A semiconductor device including a driver circuit portion and a display portion (also referred to as a pixel portion) over the same substrate is provided. The driver circuit portion and the display portion include thin film transistors in which a semiconductor layer includes an oxide semiconductor; a first wiring; and a second wiring. The thin film transistors each include a source electrode layer and a drain electrode layer which each have a shape whose end portions are located on an inner side than end portions of the semiconductor layer. In the thin film transistor in the driver circuit portion, the semiconductor layer is provided between a gate electrode layer and a conductive layer. The first wiring and the second wiring are electrically connected in an opening provided in a gate insulating layer through an oxide conductive layer.

Claims

1. A semiconductor device comprising:

a driver circuit portion comprising a first thin film transistor and a pixel portion comprising a second thin film transistor over the same substrate, the first thin film transistor and the second thin film transistor each comprising;

a gate electrode layer over a substrate;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer, the oxide semiconductor layer overlapping the gate electrode layer;

a first conductive layer over the oxide semiconductor layer, the first conductive layer being electrically connected to the oxide semiconductor layer;

a second conductive layer over the oxide semiconductor layer, the second conductive layer being electrically connected to the oxide semiconductor layer;

an oxide insulating layer over the oxide semiconductor layer, the first conductive layer and the second conductive layer, the oxide insulating layer being in contact with a first top surface of an end portion of the oxide semiconductor layer and a second top surface of the oxide semiconductor layer between the first conductive layer and the second conductive layer;

a pixel electrode layer over the oxide insulating layer; and

a liquid crystal layer over the pixel electrode layer,

wherein the first thin film transistor further comprises a third conductive layer which overlaps with the oxide semiconductor layer over the oxide insulating layer, and

wherein the second conductive layer of the second thin film transistor is electrically connected to the pixel electrode layer.

2. The semiconductor device according to claim 1, further comprising a first oxide conductive layer between the first conductive layer and the oxide semiconductor layer and a second oxide conductive layer between the second conductive layer and the oxide semiconductor layer wherein each of the first oxide conductive layer and the second oxide conductive layer comprises zinc oxide, zinc aluminum oxide, zinc aluminum oxynitride, or gallium zinc oxide.

3. The semiconductor device according to claim 1,

wherein the gate insulating layer has a single-layer structure or a stacked-layer structure of a silicon oxide layer, a silicon oxynitride layer, or an aluminum oxide layer.

4. The semiconductor device according to claim 1,

wherein the pixel electrode layer comprises indium oxide, an indium oxide-tin oxide alloy, an indium oxide-zinc oxide alloy, or zinc oxide.

5. The semiconductor device according to claim 1,

wherein the first conductive layer and the second conductive layer of the second thin film transistor are formed from a film comprising an element selected from Al, Cr, Cu, Ta, Ti, Mo, or W as its main component, an alloy film of the elements, or a stacked film of the elements.

6. A semiconductor device comprising:

a driver circuit portion comprising a first thin film transistor and a pixel portion comprising a second thin film transistor over the same substrate, the first thin film transistor and the second thin film transistor each comprising;

a gate electrode layer over a substrate;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer;

a source electrode layer over the oxide semiconductor layer, the source electrode layer having a shape whose end portion is located on an inner side than an end portion of the oxide semiconductor layer;

a drain electrode layer over the oxide semiconductor layer, the drain electrode layer having a shape whose end portion is located on an inner side than an end portion of the oxide semiconductor layer;

a first oxide conductive layer in contact with the source electrode layer and the oxide semiconductor layer;

a second oxide conductive layer in contact with the drain electrode layer and the oxide semiconductor layer;

an oxide insulating layer over the oxide semiconductor layer, the source electrode layer and the drain electrode layer;

a pixel electrode layer over the oxide insulating layer; and

a liquid crystal layer over the pixel electrode layer,

wherein the first thin film transistor further comprises a conductive layer which overlaps with the oxide semiconductor layer over the oxide insulating layer, and

wherein the second thin film transistor is electrically connected to the pixel electrode layer.

7. The semiconductor device according to claim 6,

wherein each of the first oxide conductive layer and the second oxide conductive layer comprises zinc oxide, zinc aluminum oxide, zinc aluminum oxynitride, or gallium zinc oxide.

8. The semiconductor device according to claim 6,

wherein the gate insulating layer has a single-layer structure or a stacked-layer structure of a silicon oxide layer, a silicon oxynitride layer, or an aluminum oxide layer.

9. The semiconductor device according to claim 6,

wherein the pixel electrode layer and the conductive layer comprise indium oxide, an indium oxide-tin oxide alloy, an indium oxide-zinc oxide alloy, or zinc oxide.

10. The semiconductor device according to claim 6,

wherein the source electrode layer and the drain electrode layer of the second thin film transistor are formed from a film comprising an element selected from Al, Cr, Cu, Ta, Ti, Mo, or W as its main component, an alloy film of the elements, or a stacked film of the elements.

11. A method of manufacturing a semiconductor device, the method comprising steps of:

forming a first gate electrode layer and a second gate electrode layer over a substrate;

forming a gate insulating layer over the first gate electrode layer and the second gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

forming a first conductive layer over the oxide semiconductor layer;

forming a first resist mask comprising a first region and a second region with a thickness smaller than a thickness of the first region over the first conductive layer;

etching the first conductive layer and the oxide semiconductor layer to form a first island-shape oxide semiconductor layer overlapped with the first gate electrode layer, a second island-shape oxide semiconductor layer overlapped with the second gate electrode layer, a first island-shape conductive layer over the first island-shape oxide semiconductor layer and a second island-shape conductive layer over the second island-shape oxide semiconductor layer by using the first resist mask;

ashing the first resist mask to form a second resist mask by removing the second region;

etching the first island-shape conductive layer and the second island-shape conductive layer to form a first source electrode layer electrically connected to the first island-shape oxide semiconductor layer, a first drain electrode layer electrically connected to the first island-shape oxide semiconductor layer, a second source electrode layer electrically connected to the second island-shape oxide semiconductor layer and a second drain electrode layer electrically connected to the second island-shape oxide semiconductor layer by using the second resist mask;

forming an oxide insulating layer over the first island-shape oxide semiconductor layer, the second island-shape oxide semiconductor layer, the first source electrode layer, the first drain electrode layer, the second source electrode layer and the second drain electrode layer;

forming a transparent conductive film over the oxide insulating layer;

etching the transparent conductive film to form a pixel electrode layer electrically connected to the second drain electrode layer and a second conductive layer overlapped with the first gate electrode layer; and

forming a liquid crystal layer over the pixel electrode layer.