Structure and Method For Forming Laterally Extending Dielectric Layer in a Trench-Gate FET
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Accused Products
Abstract
A FET is formed as follows. A trench is formed in a silicon region. A shield electrode is formed in a bottom portion of the trench. The shield electrode is insulated from adjacent silicon region by a shield dielectric. A silicon nitride layer is formed over a surface of the silicon region adjacent the trench, along the trench sidewalls, and over the shield electrode and shield dielectric. A layer of LTO is formed over the silicon nitride layer such that those portions of the LTO layer extending over the surface of the silicon region adjacent the trench are thicker than the portion of the LTO layer extending over the shield electrode. The LTO layer is uniformly etched back such that a portion of the silicon nitride layer becomes exposed while portions of the silicon nitride layer remain covered.
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Citations
44 Claims
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1-22. -22. (canceled)
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23. A method of forming a FET, comprising:
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forming a trench in a silicon region; forming a shield electrode in a bottom portion of the trench, the shield electrode being insulated from adjacent silicon region by a shield dielectric; forming a silicon nitride layer extending over a surface of the silicon region adjacent the trench, along the trench sidewalls, and over the shield electrode and shield dielectric; forming a layer of low temperature oxide (LTO) over the silicon nitride layer such that those portions of the LTO layer extending over the surface of the silicon region adjacent the trench are thicker than the portion of the LTO layer extending over the shield electrode; and uniformly etching back the LTO layer such that a portion of the silicon nitride layer extending over the shield electrode and along at least a portion of the trench sidewalls becomes exposed while portions of the silicon nitride layer extending over the surface of the silicon region adjacent the trench remain covered by remaining portions of the LTO layer. - View Dependent Claims (24, 25, 26, 27, 28, 29)
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30. A method of forming a FET, comprising:
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forming a trench in a silicon region; forming a shield electrode in a bottom portion of the trench, the shield electrode being insulated from adjacent silicon region by a shield dielectric; forming an oxidation barrier layer extending over a surface of the silicon region adjacent the trench, along the trench sidewalls, and over the shield electrode; forming a protective layer over the oxidation barrier layer inside and outside the trench; and partially removing the protective layer such that a portion of the oxidation barrier layer extending at least over the shield electrode becomes exposed and portions of the oxidation barrier layer extending over the surface of the silicon region adjacent the trench remain covered by remaining portions of the protective layer. - View Dependent Claims (31, 32, 33, 34, 35, 36, 37, 38, 39, 40)
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41. An intermediary of a FET, comprising:
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a trench extending into a silicon region; a shield electrode recessed in a lower portion of the trench, the shield electrode being insulated from the silicon region by a shield dielectric; an oxidation barrier layer extending over a surface of the silicon region adjacent the trench and along the trench sidewalls but being discontinuous over the shield electrode; and a protective layer extending over all horizontally extending portions of the oxidation barrier layer. - View Dependent Claims (42, 43, 44)
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Specification