METHODS FOR FABRICATING SEMICONDUCTOR COMPONENTS AND PACKAGED SEMICONDUCTOR COMPONENTS

• US 20110031614A1
• Filed: 10/18/2010
• Published: 02/10/2011
• Est. Priority Date: 03/02/2007
• Status: Abandoned Application

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Farnworth, Warren M.
• Application Number:
  US12/906,818
• Publication Number:
  US 20110031614A1
• Time in Patent Office: Days
• US Class Current: 257/734
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 2224/0554 External layer
• CPC Class Codes: H01L 2224/0555 Shape
• CPC Class Codes: H01L 2224/0556 Disposition
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/05611 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/05618 Zinc [Zn] as principal constituent
• CPC Class Codes: H01L 2224/05639 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05655 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/05664 Palladium [Pd] as principal constituent
• CPC Class Codes: H01L 2224/05669 Platinum [Pt] as principal constituent
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 23/3157 Partial encapsulation or coating mask layer used as insulation layer H01L21/31
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/013 : Alloys

Abstract

Packaged semiconductor components and methods for manufacturing packaged semiconductor components. In one embodiment a semiconductor component comprises a die having a semiconductor substrate and an integrated circuit. The substrate has a first side, a second side, a sidewall between the first and second sides, a first indentation at the sidewall around a periphery of the first side, and a second indentation at the sidewall around a periphery of the second side. The component can further include a first exterior cover at the first side and a second exterior cover at the second side. The first exterior cover has a first extension in the first indentation, and the second exterior cover has a second extension in the second indentation. The first and second extensions are spaced apart from each other by an exposed portion of the sidewall.

Claims

1. A semiconductor component, comprising:

a die having a semiconductor substrate and an integrated circuit, wherein the substrate has a first side, a second side, a sidewall between the first and second sides, a first indentation at the sidewall around a periphery of the first side, and a second indentation at the sidewall around a periphery of the second side;

a first exterior cover at the first side, the first exterior cover having a first extension in the first indentation; and

a second exterior cover at the second side, the second exterior cover having a second extension in the second indentation, and wherein the first and second extensions are spaced apart from each other by an exposed portion of the sidewall.

2. The semiconductor component of claim 1, wherein the sidewall of the substrate further comprises a shoulder between the first and second indentations having a peripheral surface that defines the exposed portion of the sidewall.

3. The semiconductor component of claim 1, wherein:

the die further includes a plurality of electrical terminals at the first side that are electrically coupled to the integrated circuit; and

the first exterior cover has a front section over the first side, and the first extension projects from the front section toward the second side.

4. The semiconductor component of claim 1, wherein the second exterior cover has a back section over the second side, and the second extension projects from the back section toward the first side.

5. The semiconductor component of claim 1, wherein:

the first exterior cover comprises a first polymeric cap having a front section and the first extension, the front section having a thickness, and the first extension projecting from the front section toward the second side; and

the second exterior cover comprises a second polymeric cap having a back section and the second extension, the back section having the same thickness as the front section, and the second extension projecting from the back section toward the first side.

6. The semiconductor component of claim 5, wherein the first extension and the second extension have the same thickness as the front and back sections.

7. The semiconductor component of claim 1 wherein the substrate has a thickness between the first side and the second side of approximately 300-750 microns.

8. The semiconductor component of claim 1 wherein the substrate has a thickness between the first side and the second side, the first extension projects into the substrate by a first depth, and the second extension projects into the substrate by a second depth, and wherein a sum of the first and second depths is less than the thickness of the substrate.

9. A semiconductor component, comprising:

a die having a semiconductor substrate with a front surface, a back surface, and a sidewall between the front surface and the back surface, wherein the sidewall has a shoulder projecting outwardly;

a first polymeric cover having a front portion covering the front surface and a first extension projecting from the front portion to the shoulder; and

a second polymeric cover having a back portion covering the back surface and a second extension projecting from the back portion to the shoulder, wherein the shoulder separates the first extension from the second extension.

10. The component of claim 9 wherein the first polymeric cover and the second polymeric cover have at least approximately equal thicknesses.

11. The component of claim 9 wherein the first and second extensions have at least approximately equal thicknesses.

12. A semiconductor apparatus, comprising:

a semiconductor wafer having a plurality of dies with integrated circuits, a first side, a plurality of first channels in the first side located in lanes between the dies, a second side, and a plurality of second channels in the second side in the lanes;

a first polymeric material on the first side, wherein a portion of the first polymeric material is in the first channels; and

a second polymeric material on the second side, wherein a portion of the second polymeric material is in the second channels.

13. The apparatus of claim 12, wherein the first polymeric material comprises a first cover member having a front side portion and first extensions projecting from the front side portion and the second polymeric material comprises a second cover member having a backside portion and second extensions projecting from the backside portion, and wherein the first extensions are in the first trenches and the second extensions are in the second trenches.

14. The apparatus of claim 12, wherein the first trenches have a first depth only partially through the wafer, the second trenches have a second depth only partially through the wafer, and the first and second trenches are spaced apart by a portion of the wafer.

15. The apparatus of claim 12, wherein the wafer has a thickness between the first side and the second side of approximately 300-500 microns.

16. The apparatus of claim 12, wherein the wafer has a thickness between the first side and the second side of approximately 300-500 microns, the first trenches have a first depth of not more than 250 microns, the second trenches have a second depth of not more than 250 microns, and the first and second trenches are aligned with each other with a portion of the wafer between the first and second trenches.

17. The apparatus of claim 12, wherein the first polymeric material comprises a first cover member having a front side portion and first extensions projecting from the front side portion and the second polymeric material comprises a second cover member having a backside portion and second extensions projecting from the backside portion, and wherein the first extensions are in the first trenches and the second extensions are in the second trenches, and wherein the first and second cover members have at least approximately equal thicknesses.