EDGE CONNECT WAFER LEVEL STACKING
First Claim
1. A stacked microelectronic package comprising:
- a plurality of subassemblies including a first subassembly and a second subassembly underlying the first subassembly, each subassembly having a front face and a rear face remote from the front face, the front face of the second subassembly confronting the rear face of the first subassembly, each of the first and second subassemblies including a plurality of front contacts exposed at the front face, at least one edge and a plurality of front traces extending about the respective at least one edge, the second subassembly having a plurality of rear contacts exposed at the rear face and a plurality of rear traces extending from the rear contacts about the at least one edge to at least some of the plurality of front contacts of at least one of the first or second subassemblies, and a substrate underlying the second subassembly, the substrate having a relief channel aligned with the at least one edge of each subassembly.
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Accused Products
Abstract
In accordance with an aspect of the invention, a stacked microelectronic package is provided which may include a plurality of subassemblies, e.g., a first subassembly and a second subassembly underlying the first subassembly. A front face of the second subassembly may confront the rear face of the first subassembly. Each of the first and second subassemblies may include a plurality of front contacts exposed at the front face, at least one edge and a plurality of front traces extending about the respective at least one edge. The second subassembly may have a plurality of rear contacts exposed at the rear face. The second subassembly may also have a plurality of rear traces extending from the rear contacts about the at least one edge. The rear traces may extend to at least some of the plurality of front contacts of at least one of the first or second subassemblies.
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Citations
20 Claims
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1. A stacked microelectronic package comprising:
a plurality of subassemblies including a first subassembly and a second subassembly underlying the first subassembly, each subassembly having a front face and a rear face remote from the front face, the front face of the second subassembly confronting the rear face of the first subassembly, each of the first and second subassemblies including a plurality of front contacts exposed at the front face, at least one edge and a plurality of front traces extending about the respective at least one edge, the second subassembly having a plurality of rear contacts exposed at the rear face and a plurality of rear traces extending from the rear contacts about the at least one edge to at least some of the plurality of front contacts of at least one of the first or second subassemblies, and a substrate underlying the second subassembly, the substrate having a relief channel aligned with the at least one edge of each subassembly. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A stacked microelectronic assembly comprising:
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a first stacked subassembly and a second stacked subassembly overlying a portion of the first stacked subassembly, each stacked subassembly including at least a first microelectronic element having a face and a second microelectronic element having a face overlying and parallel to a face of the first microelectronic element, each of the first and second microelectronic elements having edges extending away from the respective face and a plurality of traces at the respective face extending about at least one respective edge, each of the first and second stacked subassemblies including contacts connected to at least some of the plurality of traces; and bond wires conductively connecting the contacts of the first stacked subassembly with the contacts of the second stacked subassembly. - View Dependent Claims (19, 20)
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Specification