CONFIGURABLE IC'S WITH LARGE CARRY CHAINS

• US 20110031998A1
• Filed: 05/17/2010
• Published: 02/10/2011
• Est. Priority Date: 11/08/2004
• Status: Active Grant

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Tabula Incorporated
• Inventors: Hutchings, Brad L., Huang, Randy R., Teig, Steven, Redgrave, Jason, Schmit, Herman
• Granted Patent: US 8,248,102 B2
• Time in Patent Office: Days
• US Class Current: 326/38
• CPC Class Codes: G06F 2207/3868 Bypass control, i.e. possibility to transfer an operand unchanged to the output
• CPC Class Codes: G06F 7/506 with simultaneous carry generation for, or propagation over, two or more stages
• CPC Class Codes: H03K 19/173 using elementary logic circuits as components

Abstract

Some embodiments provide a configurable IC that includes several configurable logic circuits, where the logic circuits include several sets of associated configurable logic circuits. For each several sets of associated configurable logic circuits, the reconfigurable IC also includes a carry circuit for performing up to N carry operations sequentially, wherein N is greater than two.

Claims

1-20. -20. (canceled)

21. An integrated circuit (IC) comprising:

a plurality of configuration data storage elements for storing a plurality of configuration data sets; and

a region comprising;

an N×

M arrangement of configurable logic circuits of a particular type,

wherein N and M are integer values that are greater than 10,

wherein each configurable logic circuit is for performing one of a plurality of operations based on one of the plurality of configuration data sets,

wherein at least one of the plurality of operations is a mathematical operation that produces propagate and generate signals for performing a larger mathematical operation; and

a direct connection between a first configurable logic circuit in said arrangement and a second configurable logic circuit in said arrangement, wherein the first configurable logic circuit and the second configurable logic circuit are not vertically or horizontally aligned and do not neighbor each other.

22. The IC of claim 21, wherein the second configurable logic circuit comprises a third configurable logic circuit and a set of input select interconnect circuits that supply inputs to the third configurable logic circuit.

23. The IC of claim 22, wherein the direct connection does not include an intervening configurable routing circuit.

24. The IC of claim 21, wherein the direct connection is for performing an expanded arithmetic operation using the first and second configurable logic circuits.

25. The IC of claim 24 further comprising a plurality of carry circuits, wherein the direct connection is for providing a carry signal from a first carry circuit to a second carry circuit, wherein the first carry circuit is shared by a first set of configurable logic circuits, wherein the second carry circuit is shared by a second set of configurable logic circuits.

26. The IC of claim 25, wherein the first set of configurable logic circuits comprises four configurable logic circuits, wherein each of the four configurable logic circuits is adjacent to the other three configurable logic circuits in the first set of configurable logic circuits.

27. The IC of claim 24, wherein each configurable logic circuit in the first set of configurable logic circuits produces a generate signal and a propagate signal for the first carry circuit.

28. The IC of claim 27, wherein each configurable logic circuit of the particular type comprises look up tables (LUTs) for producing the generate signal and the propagate signal.

29. The IC of claim 27, wherein the first carry circuit receives propagate and generate signals only from the first set of configurable logic circuits.

30. The IC of claim 29, wherein the region further comprises another direct connection between the second configurable logic circuit and a third configurable logic circuit in said arrangement, wherein the second configurable logic circuit and the third configurable logic circuit are not vertically or horizontally aligned.

31. The IC of claim 30, wherein the direct connections are for performing an expanded arithmetic operation using three or more sets of configurable logic circuits and shared carry circuits.

32. An electronic device comprising:

an electronic memory; and

an integrated circuit (IC) comprising;

a plurality of configuration data storage elements for storing a plurality of configuration data sets; and

a region comprising;

an N×

M arrangement of configurable logic circuits of a particular type,

wherein N and M are integer values that are greater than 10,

wherein each configurable logic circuit is for performing one of a plurality of operations based on one of the plurality of configuration data sets,

wherein at least one of the plurality of operations is a mathematical operation that produces propagate and generate signals for performing a larger mathematical operation; and

a direct connection between a first configurable logic circuit in said arrangement and a second configurable logic circuit in said arrangement, wherein the first configurable logic circuit and the second configurable logic circuit are not vertically or horizontally aligned and do not neighbor each other.

33. The electronic device of claim 32, wherein the second configurable logic circuit comprises a third configurable logic circuit and a set of input select interconnect circuits that supply inputs to the third configurable logic circuit.

34. The IC of claim 33, wherein the direct connection does not include an intervening configurable routing circuit.

35. The electronic device of claim 32, wherein the direct connection is for performing an expanded arithmetic operation using the first and second configurable logic circuits.

36. The electronic device of claim 35, wherein the IC further comprises a plurality of carry circuits, wherein the direct connection is for providing a carry signal from a first carry circuit to a second carry circuit, wherein the first carry circuit is shared by a first set of configurable logic circuits, wherein the second carry circuit is shared by a second set of configurable logic circuits.

37. The electronic device of claim 36, wherein the first set of configurable logic circuits comprises four configurable logic circuits, wherein each of the four configurable logic circuits is adjacent to the other three configurable logic circuits in the first set of configurable logic circuits.

38. The electronic device of claim 35, wherein each configurable logic circuit in the first set of configurable logic circuits produces a generate signal and a propagate signal for the first carry circuit.

39. An integrated circuit (IC) comprising:

a plurality of configuration data storages for storing configuration data;

a plurality of sets of configurable logic circuits for configurably performing a plurality of operations based on said configuration data, wherein at least one of the plurality of operations comprises an arithmetic operation;

a plurality of carry circuits, each carry circuit receiving propagate and generate signals from one set of configurable logic circuits; and

a plurality of direct connections, each direct connection connecting two configurable logic circuits that are not vertically or horizontally aligned and do not neighbor each other.

40. The IC of claim 39, wherein at least one direct connection is for performing an expanded arithmetic operation by providing a carry signal from a first configurable logic circuit to a second configurable logic circuit.