Economical, RF transparent, selective code phased array antenna processor
First Claim
Patent Images
1. A solid-state device comprising the following circuits:
- a plurality of adaptive amplifier modulator circuits;
at least one thin radiofrequency digitizer circuit;
a USB engine and microcode power selector interface;
a PN code selective beamforming engine circuit; and
a many input single output radio frequency (RF) combiner circuit.
4 Assignments
0 Petitions
Accused Products
Abstract
A single chip diversity beamforming antenna array processor is disclosed. The processor utilizes low-power and low area circuits to achieve combining game mitigate the effects of multipath fading provide spatial suppression and provide diversity gain to a single input receiver. The device is radiofrequency transparent yet provides antenna gain by selective three G and four G code acquisition and tracking of a desired downlink channel.
59 Citations
18 Claims
-
1. A solid-state device comprising the following circuits:
-
a plurality of adaptive amplifier modulator circuits; at least one thin radiofrequency digitizer circuit; a USB engine and microcode power selector interface; a PN code selective beamforming engine circuit; and a many input single output radio frequency (RF) combiner circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
-
-
15. A solid-state device comprising the following circuits:
-
a plurality of adaptive amplifier modulator circuits; at least one thin radiofrequency digitizer circuit; a modem baseband processor and microcode power selector interface; a PN code selective beamforming engine circuit; and a many input single output radio frequency (RF) combiner circuit. - View Dependent Claims (16, 17, 18)
-
Specification