DETECTION OF UNCORRECTABLE RE-GROWN FUSES IN A MICROPROCESSOR

• US 20110035616A1
• Filed: 03/08/2010
• Published: 02/10/2011
• Est. Priority Date: 08/07/2009
• Status: Active Grant

• Current Assignee: VIA Technologies Incorporated (VIA Technologies)
• Original Assignee: VIA Technologies Incorporated (VIA Technologies)
• Inventors: Gaskins, Stephan, Gaskins, Darius D., Henry, G. Glenn
• Granted Patent: US 8,276,032 B2
• Time in Patent Office: Days
• US Class Current: 714/2
• CPC Class Codes: G06F 11/10 Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
• CPC Class Codes: G06F 11/2236 to test CPU or processors

Abstract

A microprocessor includes a first plurality of fuses, a predetermined number of which are selectively blown. Control values are provided from the first plurality of fuses to circuits of the microprocessor to control operation of the microprocessor. The microprocessor also includes a second plurality of fuses, blown with the predetermined number of the first plurality of fuses that are blown. In response to being reset, the microprocessor is configured to: read the first plurality of fuses and count a number of them that are blown; read the predetermined number from the second plurality of fuses; compare the counted number with the predetermined number read from the second plurality of fuses; and prevent itself from fetching and executing user program instructions if the number counted from reading the first plurality of fuses does not equal the predetermined number read from the second plurality of fuses.

Claims

1. A microprocessor, comprising:

a first plurality of fuses, a predetermined number of which are selectively blown, wherein control values are provided from the first plurality of fuses to circuits of the microprocessor to control operation of the microprocessor; and

a second plurality of fuses, blown with the predetermined number of the first plurality of fuses that are blown;

wherein, in response to being reset, the microprocessor is configured to;

read the first plurality of fuses and count a number of them that are blown;

read the predetermined number from the second plurality of fuses;

compare the counted number with the predetermined number read from the second plurality of fuses; and

prevent itself from fetching and executing user program instructions if the number counted from reading the first plurality of fuses does not equal the predetermined number read from the second plurality of fuses.

2. The microprocessor of claim 1, wherein the first and second plurality of fuses are configured to be selectively blown during manufacture of the microprocessor.

3. The microprocessor of claim 1, wherein the second plurality of fuses are also blown with an error correction value for use in correcting an error in the predetermined number read from the second plurality of fuses.

4. The microprocessor of claim 3, wherein the control values are provided from the first plurality of fuses directly to circuits of the microprocessor to control operation of the microprocessor without error correction.

5. The microprocessor of claim 4, wherein the second plurality of fuses are also blown with second control values, wherein the microprocessor is further configured to correct an error in the second control values read from the second plurality of fuses and to provide the corrected second control values to second circuits of the microprocessor to control operation of the microprocessor.

6. The microprocessor of claim 1, wherein the microprocessor is configured to report an error to system software if the number counted from reading the first plurality of fuses does not equal the predetermined number read from the second plurality of fuses.

7. The microprocessor of claim 6, wherein the microprocessor is configured to report an error to system software if the number counted from reading the first plurality of fuses does not equal the predetermined number read from the second plurality of fuses, rather than preventing itself from fetching and executing user program instructions.

8. The microprocessor of claim 1, further comprising:

microcode, configured to read the first plurality of fuses and count the number of them that are blown, read the predetermined number from the second plurality of fuses, and compare the counted number with the predetermined number read from the second plurality of fuses.

9. A method for operating a microprocessor, the method comprising:

reading a first plurality of fuses, wherein a predetermined number of the first plurality of fuses are selectively blown, wherein control values are provided from the first plurality of fuses to circuits of the microprocessor to control operation of the microprocessor;

counting a number of the first plurality of fuses that are blown;

reading a predetermined number from a second plurality of fuses, wherein the second plurality of fuses are blown with the predetermined number of the first plurality of fuses that are blown;

comparing the counted number with the predetermined number read from the second plurality of fuses; and

preventing the microprocessor from fetching and executing user program instructions if the number counted from reading the first plurality of fuses does not equal the predetermined number read from the second plurality of fuses.

10. The method of claim 9, wherein the first and second plurality of fuses are configured to be selectively blown during manufacture of the microprocessor.

11. The method of claim 9, wherein the second plurality of fuses are also blown with an error correction value for use in correcting an error in the predetermined number read from the second plurality of fuses.

12. The method of claim 11, further comprising:

providing the control values from the first plurality of fuses directly to circuits of the microprocessor to control operation of the microprocessor without error correction.

13. The method of claim 12, wherein the second plurality of fuses are also blown with second control values, the method further comprising:

correcting an error in the second control values read from the second plurality of fuses; and

providing the corrected second control values to second circuits of the microprocessor to control operation of the microprocessor.

14. The method of claim 9, further comprising:

reporting an error to system software if the number counted from reading the first plurality of fuses does not equal the predetermined number read from the second plurality of fuses.

15. The method of claim 14, wherein said reporting an error to system software if the number counted from reading the first plurality of fuses does not equal the predetermined number read from the second plurality of fuses is performed rather than said preventing the microprocessor from fetching and executing user program instructions.

16. The method of claim 9, wherein said reading a first plurality of fuses, said counting a number of the first plurality of fuses that are blown, said reading a predetermined number from a second plurality of fuses, said comparing, and said preventing the microprocessor from fetching and executing user program instructions are performed by microcode of the microprocessor.

17. The method of claim 9, wherein said reading a first plurality of fuses, said counting a number of the first plurality of fuses that are blown, said reading a predetermined number from a second plurality of fuses, said comparing, and said preventing the microprocessor from fetching and executing user program instructions are performed in response to the microprocessor being reset.

18. A method for manufacturing a microprocessor having a capability to detect an incorrect control value provided by a first plurality of fuses of the microprocessor to circuits of the microprocessor during operation of the microprocessor to control operation thereof, the control value being incorrect because a blown one or more of the first plurality of fuses is providing its non-blown value rather than its blown value, the method comprising:

determining the control value;

counting a number of the first plurality of fuses to be blown to create the control value in the first plurality of fuses;

blowing the control value into the first plurality of fuses; and

blowing into a second plurality of fuses of the microprocessor the number of the first plurality of fuses blown to create the control value.

19. The method of claim 18, further comprising:

computing an error correction value from the number, wherein the error correction value is for use in correcting an error in the number when subsequently reading the number from the second plurality of fuses; and

blowing the error correction value into the second plurality of fuses.

20. A computer program product encoded in at least one computer readable medium for use with a computing device, the computer program product comprising:

computer readable program code embodied in said medium, for specifying a microprocessor, the computer readable program code comprising;

first program code for specifying a first plurality of fuses, a predetermined number of which are selectively blown, wherein control values are provided from the first plurality of fuses to circuits of the microprocessor to control operation of the microprocessor; and

second program code for specifying a second plurality of fuses, blown with the predetermined number of the first plurality of fuses that are blown;

wherein, in response to being reset, the microprocessor is configured to;

read the first plurality of fuses and count a number of them that are blown;

read the predetermined number from the second plurality of fuses;

compare the counted number with the predetermined number read from the second plurality of fuses; and

prevent itself from fetching and executing user program instructions if the number counted from reading the first plurality of fuses does not equal the predetermined number read from the second plurality of fuses.

21. The computer program product of claim 20, wherein the at least one computer readable medium is selected from the set of a disk, tape, or other magnetic, optical, or electronic storage medium and a network, wire line, wireless or other communications medium.