MICROELECTRONIC DEVICE AND FABRICATING METHOD THEREOF AND MEMS PACKAGE STRUCTURE AND FABRICATING METHOD THEREOF

• US 20110037160A1
• Filed: 04/08/2010
• Published: 02/17/2011
• Est. Priority Date: 08/11/2009
• Status: Active Grant

• Current Assignee: PixArt Imaging Incorporated
• Original Assignee: PixArt Imaging Incorporated
• Inventors: HSU, Hsin-Hui, Wang, Chuan-Wei, Lee, Sheng-Ta
• Granted Patent: US 8,372,675 B2
• Time in Patent Office: Days
• US Class Current: 257/690
• CPC Class Codes: B81B 3/0018 Structures acting upon the moving or flexible element for transforming energy into mechanical movement or vice versa, i.e. actuators, sensors, generators
• CPC Class Codes: B81C 1/00015 for manufacturing microsystems
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 1/00333 Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325
• CPC Class Codes: B81C 2203/0145 Hermetically sealing an opening in the lid
• CPC Class Codes: B81C 2203/0714 Forming the micromechanical structure with a CMOS process
• CPC Class Codes: H01L 21/768 Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
• CPC Class Codes: H01L 27/1443 with at least one potential jump or surface barrier
• CPC Class Codes: H01L 27/14632 Wafer-level processed structures

Abstract

A fabricating method of a microelectronic device including the following steps is provided. First, a substrate is provided. Second, a semi-conductor element is formed in a CMOS circuit region of the substrate. Next, a plurality of metallic layer, a plurality of contact plugs and a plurality of oxide layer are formed on the substrate. The metallic layers and the oxide layers are interlaced with each other and the contact plugs are formed in the oxide layers and connected with the metallic layers correspondingly so as to form a micro electromechanical system (MEMS) structure within a MEMS region and an interconnecting structure within the CMOS circuit region. Then, a first protective layer is formed on at least one of the oxide layers and a second protective layer is formed on the interconnecting structure. Predetermined portions of the oxide layers located within the MEMS region are removed and thereby the MEMS structure is partially suspended above the substrate. The present invention also provides a microelectronic device, a MEMS package structure and a fabricating method thereof

Claims

1. A fabricating method of a microelectronic device, comprising the steps of:

providing a substrate having a CMOS circuit region and a micro electromechanical system (MEMS) region;

forming a semi-conductor element in the CMOS circuit region of the substrate;

forming at least a first metallic layer, a plurality of first contact plugs and at least a first oxide layer on the substrate, the at least a first metallic layer and the at least a first oxide layer interlaced with each other, the first contact plugs formed in the at least a first oxide layer and connected with the at least a first metallic layer correspondingly;

forming a first protective layer on a portion of the at least a first oxide layer within the MEMS region;

forming a plurality of second metallic layers, a plurality of second contact plugs and a plurality of second oxide layers on the at least a first oxide layer and the first protective layer, the second metallic layers and the second oxide layers interlaced with each other, the second contact plugs formed in the second oxide layers and connected with the second metallic layers, portions of the second metallic layers, the second contact plugs and the second oxide layers located within the MEMS region composing a MEMS structure, and other portions of the second metallic layers, the second contact plugs and the second oxide layers located within the CMOS circuit region and portions of the at least a first metallic layer, the first contact plugs and the at least a first oxide layer located within the CMOS circuit region composing an interconnecting structure;

forming a second protective layer on the interconnecting structure, thereby covering the interconnecting structure; and

removing predetermined portions of the second oxide layers within the MEMS region and thereby making the MEMS structure partially suspended above the substrate to be a MEMS element.

2. The fabricating method as claimed in claim 1, further comprising removing the second protective layer after the predetermined portions of the second oxide layers within the MEMS region are removed.

3. The fabricating method as claimed in claim 2, wherein material of the second protective comprises amorphous silicon, and a removing method of the second protective layer includes gas etching with xenon fluoride.

4. The fabricating method as claimed in claim 2, further comprises removing the first protective layer while removing the second protective layer.

5. The fabricating method as claimed in claim 1, wherein a removing method of the predetermined portions of the oxide layers within the MEMS region comprises hydrofluoric acid vapor etching.

6. The fabricating method as claimed in claim 2, wherein the at least a first oxide layer is doped with phosphorus ions, and a portion of the at least a first oxide layer located within the MEMS region is still covered by the first protective layer after removing the second protective layer.

7. A fabricating method, comprising:

providing a substrate having a CMOS circuit region and a micro electromechanical system (MEMS) region;

forming a semi-conductor element within the CMOS circuit region of a substrate;

forming a plurality of metallic layers, a plurality of contact plugs and a plurality of oxide layers on the substrate, the metallic layers and the oxide layers interlaced with each other, the contact plugs formed in the oxide layers and connected with the metallic layers correspondingly so as to form an interconnecting structure above the CMOS circuit region, portions of the metallic layers, the contact plugs and the oxide layers located within the MEMS region composing a MEMS structure, and one of the metallic layers located above the MEMS structure having a plurality of first openings;

forming a protective layer on the interconnecting structure, thereby covering the interconnecting structure;

forming a mask layer with a plurality of second openings above the MEMS structure, the second openings and the first openings staggered with each other;

removing predetermined portions of the oxide layers within the MEMS region by employing the first openings and the second openings as etching channels, thereby making the MEMS structure partially suspended above the substrate to be a MEMS element; and

forming a packaging layer on the protective layer and the mask layer, the packaging layer filling in the second openings, thereby sealing the MEMS element between the metallic layers and the substrate.

8. The fabricating method as claimed in claim 7, wherein the mask layer and the protective layer are formed in the same process.

9. The fabricating method as claimed in claim 7, further comprising removing a portion of the packaging layer above the interconnecting structure and removing the protective layer.

10. The fabricating method as claimed in claim 9, wherein the semi-conductor element comprises a photo sensor, and after removing the portion of the packaging layer above the interconnecting structure and removing the protective layer, a micro lens is formed on the interconnecting structure corresponding to the photo sensor.

11. The fabricating method as claimed in claim 9, wherein materials of the packaging layer and the protective layer comprise amorphous silicon, and a removing method of the packaging layer and the protective layer comprises gas etching with xenon fluoride.

12. The fabricating method as claimed in claim 7, wherein a removing method of the predetermined portions of the oxide layers within the MEMS region comprises hydrofluoric acid vapor etching.

13. A microelectronic device, comprising:

a substrate having a CMOS circuit region and a micro electromechanical system (MEMS) region;

at least a semi-conductor element configured within the CMOS circuit region of the substrate;

an anti metal ion layer disposed within the CMOS circuit region of the substrate and covering the semi-conductor element;

a non-doping oxide layer disposed on the substrate within the MEMS region; and

a MEMS structure partially suspended above the non-doping oxide layer.

14. The microelectronic device as claimed in claim 13, further comprising an interconnecting structure disposed on the anti metal ion layer.

15. The microelectronic device as claimed in claim 13, wherein the anti metal ion layer is a phosphorus doped silicon oxide layer.

16. A micro electromechanical system (MEMS) package structure, comprising:

a substrate;

a MEMS structure partially suspended above the substrate;

a metallic layer with a plurality of first openings disposed above the MEMS structure;

a mask layer with a plurality of second openings disposed above the metallic layer, wherein the second openings and the first openings staggered with each other; and

a packaging layer disposed on the mask layer and filling into the second openings so as to connect to the metallic layer.

17. The MEMS package as claimed in claim 16, wherein materials of the mask layer and the packaging layer comprises metallic material or amorphous silicon.

18. The MEMS package as claimed in claim 17, wherein the materials of the mask layer and the packaging layer comprises aluminum.

19. A method for fabricating a micro electromechanical system (MEMS) package, comprising:

providing a substrate;

forming a plurality of metallic layers, a plurality of contact plugs and a plurality of oxide layers so as to compose a MEMS structure, wherein one of the metallic layers disposed above the MEMS structure having a plurality of first openings;

forming a mask layer with a plurality of second openings on the top one of metallic layers, the second openings and the first openings staggered with each other;

removing predetermined portions of the oxide layers by employing the first openings and the second openings as etching channels, thereby making the MEMS structure partially suspended above the substrate; and

forming a packaging layer on the mask layer, the packaging layer filling into the second openings, thereby sealing the MEMS structure between the metallic layers and the substrate.

20. The method for fabricating a MEMS package as claimed in claim 19, wherein a removing method of the predetermined portions of the oxide layers comprises hydrofluoric acid vapor etching.