Bridgeless Boost PFC Circuits and Systems With Reduced Common Mode EMI

• US 20110037444A1
• Filed: 08/11/2009
• Published: 02/17/2011
• Est. Priority Date: 08/11/2009
• Status: Active Grant

• Current Assignee: Astec International Limited (Emerson Electric Company)
• Original Assignee: Astec International Limited (Emerson Electric Company)
• Inventors: Wildash, Kevin D.
• Granted Patent: US 8,289,737 B2
• Time in Patent Office: Days
• US Class Current: 323/210
• CPC Class Codes: H02M 1/0085 Partially controlled bridges
• CPC Class Codes: H02M 1/126 using passive filters
• CPC Class Codes: H02M 1/4225 using a non-isolated boost converter
• CPC Class Codes: H02M 1/44 Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
• CPC Class Codes: Y02P 80/10 Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier

Abstract

According to one example embodiment, a bridgeless boost power factor correction (PFC) system includes a first input for connection to a first line of an alternating current (AC) source and a second input for connection to a second line of the AC source. The PFC system includes an output for delivering an output of the bridgeless boost PFC system, a first boost choke coupled to the first input and a second boost choke coupled to the second input. A common mode choke is coupled between the first and second input and the first and second boost choke. A first X capacitor is coupled between the first input and the output and a second X capacitor coupled between the second input and the output.

Claims

1. A bridgeless boost power factor correction (PFC) system comprising:

a first input for connection to a first line of an alternating current (AC) source;

a second input for connection to a second line of the AC source;

an output for delivering an output of the bridgeless boost PFC system;

a first boost choke coupled to the first input;

a second boost choke coupled to the second input;

a common mode choke coupled between the first and second input and the first and second boost choke; and

a first X capacitor coupled between the first input and the output; and

a second X capacitor coupled between the second input and the output.

2. The bridgeless boost PFC system of claim 1 wherein the first boost choke and the second boost choke are wound on a same magnetic core.

3. The bridgeless boost PFC system of claim 2, wherein the first boost choke and the second boost choke are wound in opposite directions on the magnetic core.

4. The bridgeless boost PFC system of claim 2, wherein the magnetic core is low permeability core.

5. The bridgeless boost PFC system of claim 1, further comprising an EMI filter coupled to the first and second inputs.

6. The bridgeless boost PFC system of claim 5 wherein the EMI filter includes at least one of an additional X capacitor, a Y capacitor, an additional common mode choke and a differential mode choke.

7. The bridgeless boost PFC system of claim 5, wherein said EMI filter is adapted to permit voltage boosting without disruption in the operation of said system.

8. The bridgeless boost PFC system of claim 1, wherein said common mode choke comprises a low loss transformer ferrite.

9. The bridgeless boost PFC system of claim 1, wherein said common mode choke is a high inductance choke.

10. The bridgeless boost PFC system of claim 1, wherein the capacitance of each of the first and second X capacitors is at least 100 nF.

11. The bridgeless boost PFC system of claim 1, wherein a number of turns on said common mode choke has no direct relationship to a number of turns on the first and second boost chokes.

12. The bridgeless boost PFC system of claim 1, wherein an additional X capacitor is coupled across said common mode choke to bypass its leakage inductance.

13. The bridgeless boost PFC system of claim 1, further comprising a Y capacitor coupled to ground.

14. The bridgeless boost PFC system of claim 1, further comprising at least one switch and a PWM controller for controlling the switch, wherein said PWM controller is adapted to receive signals from an AC input polarity sensing circuit for an ‘

always ON’

or ‘

always OFF’

switching methodology.

17. An AC power supply unit including a PFC system of claim 1.

15. A method for power factor correction in an AC power current carrying system, said method comprising:

receiving and storing energy from an incoming AC power supply in a first and second boost choke;

presenting a relatively high input impedance to the boost chokes;

rectifying the incoming AC power supply using a combination of a pair of rectifier diodes and semiconductor switches;

controlling a duty cycle of the semiconductor switches;

bypassing an input line of the AC power supply to an output terminal with a relatively low impedance so that a small high frequency potential difference exists between the input line of the AC power supply and said output terminal to reduce common mode conducted electromagnetic interference (EMI).

16. The method of claim 15, further comprising filtering EMI from the AC power supply.