SEMICONDUCTOR DEVICE MANUFACTURING METHOD

• US 20110039407A1
• Filed: 08/26/2008
• Published: 02/17/2011
• Est. Priority Date: 08/31/2007
• Status: Active Grant

• Current Assignee: Tokyo Electron Limited
• Original Assignee: Tokyo Electron Limited
• Inventors: Nishizuka, Tetsuya, Takahashi, Masahiko
• Granted Patent: US 8,765,589 B2
• Time in Patent Office: Days
• US Class Current: 438/593
• CPC Class Codes: H01L 21/28 Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268 etching for patterning the electrodes H01L21/311, H01L21/3213; multistep manufacturing processes for data storage electrodes H01L29/4011
• CPC Class Codes: H01L 21/28008 Making conductor-insulator-semiconductor electrodes
• CPC Class Codes: H01L 21/306 Chemical or electrical treatment, e.g. electrolytic etching to form insulating layers H01L21/31
• CPC Class Codes: H01L 21/32137 of silicon-containing layers
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET

Abstract

A semiconductor device manufacturing method, the method including: forming an insulation layer having a protruding portion, the insulation layer having a surface and a rising surface that protrudes upward from the surface, on a semiconductor substrate; forming a conductive layer to cover the insulation layer having the protruding portion; and removing a predetermined region of the conductive layer by patterning the predetermined region according to an etching process using microwave plasma, which uses a microwave as a plasma source, while applying bias power of 70 mW/cm² or above on the semiconductor substrate, under a high pressure condition of 85 mTorr or above.

Claims

1. A semiconductor device manufacturing method, the method comprising:

forming an insulation layer having a protruding portion, the insulation layer having a surface and a rising surface that protrudes upward from the surface, on a semiconductor substrate;

forming a conductive layer to cover the insulation layer having the protruding portion; and

removing a predetermined region of the conductive layer by patterning the predetermined region according to an etching process using microwave plasma, which uses a microwave as a plasma source, while applying bias power of 70 mW/cm² or above on the semiconductor substrate, under a high pressure condition of 85 mTorr or above.

2. The method of claim 1, wherein a bias voltage of a frequency from 100 kHz to 2 MHz is applied to the semiconductor substrate, while performing the etching process.

3. The method of claim 1, wherein a flow of an etching gas is 1600 sccm or above while performing the etching process.

4. The method of claim 1, wherein the insulation layer is an oxidized silicon film, and the conductive layer is a polysilicon layer.

5. The method of claim 1, further comprising:

before the forming of the insulation layer, forming a conductive layer having a protruding portion that protrudes upward on the semiconductor substrate,

wherein the insulation layer comprises a thin insulation layer formed on a surface of the conductive layer having the protruding portion.

6. The method of claim 1, wherein the insulation layer having the protruding portion is disposed on the top of the rising surface with a predetermined height from the surface.

7. A semiconductor device manufacturing method, the method comprising:

forming a protrusion, which extends by protruding upward from a main surface of a semiconductor substrate and is to constitute a source region and a drain region;

forming an insulation layer, which is to constitute a gate insulation film, on a channel region disposed between the source region and the drain region of the protrusion;

forming a conductive layer covering the protrusion and the insulation layer; and

forming a gate electrode by removing the conductive layer while leaving a portion of the conductive layer on the channel region, by patterning the conductive layer according to an etching process using microwave plasma, which uses a microwave as a plasma source, while applying bias power of 70 mW/cm² or above to the semiconductor substrate, under a high pressure condition of 85 mTorr or above.