Complex Matrix Multiplication Operations with Data Pre-Conditioning in a High Performance Computing Architecture

• US 20110040822A1
• Filed: 08/17/2009
• Published: 02/17/2011
• Est. Priority Date: 08/17/2009
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Gunnels, John A., Gschwind, Michael K., Eichenberger, Alexandre E.
• Granted Patent: US 8,650,240 B2
• Time in Patent Office: Days
• US Class Current: 708/607
• CPC Class Codes: G06F 17/16 Matrix or vector computation , e.g. matrix-matrix or matrix-vector multiplication, matrix factorization matrix transposition G06F7/78
• CPC Class Codes: G06F 9/30014 with variable precision
• CPC Class Codes: G06F 9/30032 Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
• CPC Class Codes: G06F 9/30036 Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
• CPC Class Codes: G06F 9/30043 LOAD or STORE instructions; Clear instruction
• CPC Class Codes: G06F 9/30109 having multiple operands in a single register

Abstract

Mechanisms for performing a complex matrix multiplication operation are provided. A vector load operation is performed to load a first vector operand of the complex matrix multiplication operation to a first target vector register. The first vector operand comprises a real and imaginary part of a first complex vector value. A complex load and splat operation is performed to load a second complex vector value of a second vector operand and replicate the second complex vector value within a second target vector register. The second complex vector value has a real and imaginary part. A cross multiply add operation is performed on elements of the first target vector register and elements of the second target vector register to generate a partial product of the complex matrix multiplication operation. The partial product is accumulated with other partial products and a resulting accumulated partial product is stored in a result vector register.

Claims

1. A method, in a data processing system comprising a processor, for performing a complex matrix multiplication operation, comprising:

performing, by the processor, a vector load operation to load a first vector operand of the complex matrix multiplication operation to a first target vector register of the data processing system, the first vector operand comprising a real part of a first complex vector value and an imaginary part of the first complex vector value;

performing, by the processor, a complex load and splat operation to load a second complex vector value of a second vector operand and replicate the second complex vector value within a second target vector register of the data processing system, wherein the second complex vector value has a real part and an imaginary part;

performing, by the processor, a cross multiply add operation on elements of the first target vector register and elements of the second target vector register to generate a partial product of the complex matrix multiplication operation; and

accumulating, by the processor, the partial product of the complex matrix multiplication operation with other partial products of the complex matrix multiplication operation and storing a resulting accumulated partial product in a result vector register.

2. The method of claim 1, wherein performing the complex load and splat operation comprises:

loading the real part of the second complex vector value to a first vector element of the second target vector register;

loading the imaginary part of the second complex vector value to a second vector element of the second target vector register;

replicating the real part of the second complex vector value to a third vector element of the second target vector register; and

replicating the imaginary part of the second complex vector value to a fourth vector element of the second target vector register.

3. The method of claim 2, wherein performing the vector load operation to load the first vector operand of the complex matrix multiplication operation to the first target vector register comprises:

loading the real part of the first complex vector value to a first vector element of the first target vector register;

loading the imaginary part of the first complex vector value to a second vector element of the first target vector register;

loading a real part of a third complex vector value to a third vector element of the first target vector register; and

loading an imaginary part of the third complex vector value to a fourth vector element of the first target vector register.

4. The method of claim 3, wherein performing the cross multiply add operation comprises performing a first multiplication operation in which:

the first vector element of the second vector register is multiplied with the first vector element of the first vector register to generate a first result value that is accumulated with a first vector element of the result vector register and stored in the first vector element of the result vector register;

the first vector element of the second vector register is multiplied with the second vector element of the first vector register to generate a second result value that is accumulated with a second vector element of the result vector register and stored in the second vector element of the result vector register;

the third vector element of the second vector register is multiplied with the third vector element of the first vector register to generate a third result value that is accumulated with a third vector element of the result vector register and stored in the third vector element of the result vector register; and

the third vector element of the second vector register is multiplied with the fourth vector element of the first vector register to generate a fourth result value that is accumulated with a fourth vector element of the result vector register and stored in the fourth vector element of the result vector register.

5. The method of claim 4, wherein performing the cross multiply add operation comprises performing a second multiplication operation in which:

the second vector element of the second vector register is multiplied with the second vector element of the first vector register to generate a fifth result value that is subtracted from a value stored in the first vector element of the result vector register and stored in the first vector element of the result vector register;

the second vector element of the second vector register is multiplied with the first vector element of the first vector register to generate a sixth result value that is accumulated with the second vector element of the result vector register and stored in the second vector element of the result vector register;

the fourth vector element of the second vector register is multiplied with the fourth vector element of the first vector register to generate a seventh result value that is subtracted from a value stored in the third vector element of the result vector register and stored in the third vector element of the result vector register; and

the fourth vector element of the second vector register is multiplied with the third vector element of the first vector register to generate an eighth result value that is accumulated with the fourth vector element of the result vector register and stored in the fourth vector element of the result vector register.

6. The method of claim 1, further comprising:

performing, by the processor, a complex load and splat operation to load a third complex vector value of the second vector operand and replicate the third complex vector value within the second target vector register, wherein the third complex vector value has a real part and an imaginary part;

performing, by the processor, a second cross multiply add operation on elements of the first target vector register and elements of the second target vector register to generate a second partial product of the complex matrix multiplication operation; and

accumulating, by the processor, the second partial product of the complex matrix multiplication operation with the first partial product of the complex matrix multiplication operation and storing a resulting of the complex matrix multiplication operation.

7. The method of claim 1, wherein accumulating the partial product of the complex matrix multiplication operation with other partial products of the complex matrix multiplication operation is performed without performing a separate data reorganization operation.

8. The method of claim 1, wherein the complex load and splat operation replicates elements directly from a load unit of the data processing system.

9. A computer program product comprising a computer readable storage medium having a computer readable program recorded thereon, wherein the computer readable program, when executed on a computing device, causes the computing device to:

perform a vector load operation to load a first vector operand of a complex matrix multiplication operation to a first target vector register, the first vector operand comprising a real part of a first complex vector value and an imaginary part of the first complex vector value;

perform a complex load and splat operation to load a second complex vector value of a second vector operand and replicate the second complex vector value within a second target vector register, wherein the second complex vector value has a real part and an imaginary part;

perform a cross multiply add operation on elements of the first target vector register and elements of the second target vector register to generate a partial product of the complex matrix multiplication operation; and

accumulate the partial product of the complex matrix multiplication operation with other partial products of the complex matrix multiplication operation and storing a resulting accumulated partial product in a result vector register.

10. The computer program product of claim 9, wherein the computer readable program causes the computing device to perform the complex load and splat operation by:

loading the real part of the second complex vector value to a first vector element of the second target vector register;

loading the imaginary part of the second complex vector value to a second vector element of the second target vector register;

replicating the real part of the second complex vector value to a third vector element of the second target vector register; and

replicating the imaginary part of the second complex vector value to a fourth vector element of the second target vector register.

11. The computer program product of claim 10, wherein the computer readable program causes the computing device to perform the vector load operation to load the first vector operand of the complex matrix multiplication operation to the first target vector register by:

loading the real part of the first complex vector value to a first vector element of the first target vector register;

loading the imaginary part of the first complex vector value to a second vector element of the first target vector register;

loading a real part of a third complex vector value to a third vector element of the first target vector register; and

loading an imaginary part of the third complex vector value to a fourth vector element of the first target vector register.

12. The computer program product of claim 11, wherein the computer readable program causes the computing device to perform the cross multiply add operation by performing a first multiplication operation in which:

the first vector element of the second vector register is multiplied with the first vector element of the first vector register to generate a first result value that is accumulated with a first vector element of the result vector register and stored in the first vector element of the result vector register;

the first vector element of the second vector register is multiplied with the second vector element of the first vector register to generate a second result value that is accumulated with a second vector element of the result vector register and stored in the second vector element of the result vector register;

the third vector element of the second vector register is multiplied with the third vector element of the first vector register to generate a third result value that is accumulated with a third vector element of the result vector register and stored in the third vector element of the result vector register; and

the third vector element of the second vector register is multiplied with the fourth vector element of the first vector register to generate a fourth result value that is accumulated with a fourth vector element of the result vector register and stored in the fourth vector element of the result vector register.

13. The computer program product of claim 12, wherein the computer readable program causes the computing device to perform the cross multiply add operation by performing a second multiplication operation in which:

the second vector element of the second vector register is multiplied with the second vector element of the first vector register to generate a fifth result value that is subtracted from a value stored in the first vector element of the result vector register and stored in the first vector element of the result vector register;

the second vector element of the second vector register is multiplied with the first vector element of the first vector register to generate a sixth result value that is accumulated with the second vector element of the result vector register and stored in the second vector element of the result vector register;

the fourth vector element of the second vector register is multiplied with the fourth vector element of the first vector register to generate a seventh result value that is subtracted from a value stored in the third vector element of the result vector register and stored in the third vector element of the result vector register; and

the fourth vector element of the second vector register is multiplied with the third vector element of the first vector register to generate an eighth result value that is accumulated with the fourth vector element of the result vector register and stored in the fourth vector element of the result vector register.

14. The computer program product of claim 9, wherein the computer readable program further causes the computing device to:

perform a complex load and splat operation to load a third complex vector value of the second vector operand and replicate the third complex vector value within the second target vector register, wherein the third complex vector value has a real part and an imaginary part;

perform a second cross multiply add operation on elements of the first target vector register and elements of the second target vector register to generate a second partial product of the complex matrix multiplication operation; and

accumulate the second partial product of the complex matrix multiplication operation with the first partial product of the complex matrix multiplication operation and storing a resulting of the complex matrix multiplication operation.

15. The computer program product of claim 9, wherein the computer readable program causes the computing device to accumulate the partial product of the complex matrix multiplication operation with other partial products of the complex matrix multiplication operation without performing a separate data reorganization operation.

16. An apparatus, comprising:

a processor; and

a memory coupled to the processor, wherein the memory comprises instructions which, when executed by the processor, cause the processor to;

perform a vector load operation to load a first vector operand of a complex matrix multiplication operation to a first target vector register, the first vector operand comprising a real part of a first complex vector value and an imaginary part of the first complex vector value;

perform a complex load and splat operation to load a second complex vector value of a second vector operand and replicate the second complex vector value within a second target vector register, wherein the second complex vector value has a real part and an imaginary part;

perform a cross multiply add operation on elements of the first target vector register and elements of the second target vector register to generate a partial product of the complex matrix multiplication operation; and

accumulate the partial product of the complex matrix multiplication operation with other partial products of the complex matrix multiplication operation and storing a resulting accumulated partial product in a result vector register.

17. The apparatus of claim 16, wherein the processor performs the complex load and splat operation by:

loading the real part of the second complex vector value to a first vector element of the second target vector register;

loading the imaginary part of the second complex vector value to a second vector element of the second target vector register;

replicating the real part of the second complex vector value to a third vector element of the second target vector register; and

replicating the imaginary part of the second complex vector value to a fourth vector element of the second target vector register.

18. The apparatus of claim 17, wherein the processor performs the vector load operation to load the first vector operand of the complex matrix multiplication operation to the first target vector register by:

loading the real part of the first complex vector value to a first vector element of the first target vector register;

loading the imaginary part of the first complex vector value to a second vector element of the first target vector register;

loading a real part of a third complex vector value to a third vector element of the first target vector register; and

loading an imaginary part of the third complex vector value to a fourth vector element of the first target vector register.

19. The apparatus of claim 18, wherein the processor performs the cross multiply add operation by performing a first multiplication operation in which:

the first vector element of the second vector register is multiplied with the first vector element of the first vector register to generate a first result value that is accumulated with a first vector element of the result vector register and stored in the first vector element of the result vector register;

the first vector element of the second vector register is multiplied with the second vector element of the first vector register to generate a second result value that is accumulated with a second vector element of the result vector register and stored in the second vector element of the result vector register;

the third vector element of the second vector register is multiplied with the third vector element of the first vector register to generate a third result value that is accumulated with a third vector element of the result vector register and stored in the third vector element of the result vector register; and

the third vector element of the second vector register is multiplied with the fourth vector element of the first vector register to generate a fourth result value that is accumulated with a fourth vector element of the result vector register and stored in the fourth vector element of the result vector register.

20. The apparatus of claim 19, wherein the processor performs the cross multiply add operation by performing a second multiplication operation in which:

the second vector element of the second vector register is multiplied with the second vector element of the first vector register to generate a fifth result value that is subtracted from a value stored in the first vector element of the result vector register and stored in the first vector element of the result vector register;

the second vector element of the second vector register is multiplied with the first vector element of the first vector register to generate a sixth result value that is accumulated with the second vector element of the result vector register and stored in the second vector element of the result vector register;

the fourth vector element of the second vector register is multiplied with the fourth vector element of the first vector register to generate a seventh result value that is subtracted from a value stored in the third vector element of the result vector register and stored in the third vector element of the result vector register; and

the fourth vector element of the second vector register is multiplied with the third vector element of the first vector register to generate an eighth result value that is accumulated with the fourth vector element of the result vector register and stored in the fourth vector element of the result vector register.