DATA PROCESSOR AND DATA PROCESSING METHOD

• US 20110041135A1
• Filed: 06/29/2010
• Published: 02/17/2011
• Est. Priority Date: 08/11/2009
• Status: Abandoned Application

• Current Assignee: Clarion Co., Ltd. (Faurecia SA)
• Original Assignee: Clarion Co., Ltd. (Faurecia SA)
• Inventors: NAGAI, Yasushi
• Application Number:
  US12/826,093
• Publication Number:
  US 20110041135A1
• Time in Patent Office: Days
• US Class Current: 718/103
• CPC Class Codes: G06F 9/4843 by program, e.g. task dispatcher, supervisor, operating system
• CPC Class Codes: G06F 9/4881 Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
• CPC Class Codes: G06F 9/52 Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Abstract

A data processing method has a device control thread for each peripheral device capable of an independent operation, a CPU processing thread for each data processing that is performed by a CPU, a control thread equipped with a processing part for constructing an application. The control thread checks an output from the thread related with each processing part, performs with a higher priority from the processing part in which output data of the preprocessing part as a configuration of the application exists and that is near termination, and instructs execution of the each device control thread and the CPU processing thread, and data input/output. Each of device control thread and CPU processing thread processes the data according to the instructions, and sends a processing result and a notification to the control thread.

Claims

1. A data processor, comprising:

device control threads corresponding to respective peripheral devices each capable of an independent operation;

CPU processing threads corresponding to respective predetermined data processing that a CPU performs;

a control thread equipped with a plurality of processing parts for constructing an application using the device control threads and the CPU processing threads; and

an application management table for defining the application by a combination of the plurality of processing parts and managing its performance;

wherein the control thread checks output data from each thread of the device control threads and the CPU processing threads associated with the plurality of respective processing parts, performs with a higher priority from the processing part near termination of the processing of the application defined by the application management table among the plurality of processing parts corresponding to the device control threads and the CPU processing threads in each of which the output data exists, and instructs execution of the device control threads and the CPU processing threads and input/output of the data;

each of the device control threads controls the corresponding peripheral device according to the instruction, and in response to the completion notification from the peripheral device, sends a processing result of the peripheral device and the completion notification to the control thread; and

each of the CPU processing threads performs the predetermined data processing according to the instruction and sends a processing result of the predetermined data processing and a notification to the control thread.

2. The data processor according to claim 1,

wherein the control thread retains an ID of the application whose performance is controlled, when the control of the application the ID of which is retained returns to the control thread, lowers the priority of the application the ID of which is retained, and instructs with a higher priority execution of any thread of the device control threads and the CPU processing threads corresponding to the processing parts that construct another application whose performance interval is open.

3. The data processor according to claim 1,

wherein with the use of the application management table, the priority of the application is retained, execution of any thread of the device control threads and the CPU processing threads that correspond to the processing parts constructing an application of a high priority is instructed with a higher priority,

among applications the priorities of which are equal, the priority of an application corresponding to a thread instructed last to be executed is lowered, and

execution of any thread of the device control threads and the CPU process threads that correspond to the processing parts constructing another application whose performance interval is open is instructed with a higher priority.

4. A data processor, comprising:

an application management table for defining an application that makes a plurality of peripheral devices operate according to an operation sequence;

device control threads for controlling the peripheral devices correspondingly to the plurality of respective peripheral devices; and

a control thread that selects the device control thread such that the operation sequence defined by the application management table is later among the device control threads each of which has a higher priority than those of the device control threads and has input data to be processed by the peripheral device and makes it execute.

5. The data processor according to claim 4,

wherein the device control thread prepares input data to be processed for the peripheral device, and after giving an operation instruction until completion of the processing of the input data by the peripheral device, returns the control to the control thread.

6. The data processor according to claim 5,

wherein in response to the return of the control thread, the control thread newly selects the device control thread such that the operation sequence is earlier than the device control thread being executed and is the latest among the device control threads each of which has input data to be processed by the peripheral device, and makes it execute.

7. The data processor according to claim 6,

wherein the control thread makes the peripheral device corresponding to the device control thread being executed and the peripheral device corresponding to the newly selected device control thread operate in parallel.

8. The data processor according to claim 4,

wherein the device control thread is provided correspondingly to each operation type of the peripheral devices having a plurality of operation types among the plurality of peripheral devices.

9. The data processor according to claim 8,

wherein when a first device control thread for controlling an operation of a first operation type of the peripheral device in order to process a first application defined by the application management table and a second device control thread for controlling an operation of a second operation type of the peripheral device in order to process of a second application defined by the application management table overlap with each other in operation timing, the control thread controls executions of the first device control thread and the second device control thread so that the peripheral device may be controlled to perform operations of the first operation type and of the second operation type alternately.

10. A data processing method in a data processor, comprising:

an application control table for defining an application that makes a plurality of peripheral devices operate according to an operation sequence;

device control threads each for controlling the peripheral device corresponding to each of the plurality of peripheral devices; and

a control thread,

wherein the control thread selects the device control thread such that the operation sequence defined by the application management table is later among the device control threads each of which has input data to be processed by the peripheral device, and makes the selected device control thread execute.

11. The data processing method according to claim 10,

wherein the device control thread prepares input data to be processed for the peripheral device, and after giving an operation instruction and until completion of the processing of the input data by the peripheral device, returns the control to the control thread.

12. The data processing method according to claim 11,

wherein in response to the return of the control, the control thread newly selects the device control thread such that the operation sequence is earlier than the device control thread being executed and is the latest among the device control threads each of which has input data to be processed by the peripheral device, and makes the newly selected device control thread execute.