EUTECTIC FLOW CONTAINMENT IN A SEMICONDUCTOR FABRICATION PROCESS
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Accused Products
Abstract
A disclosed semiconductor fabrication process includes forming a first bonding structure on a first surface of a cap wafer, forming a second bonding structure on a first surface of a device wafer, and forming a device structure on the device wafer. One or more eutectic flow containment structures are formed on the cap wafer, the device wafer, or both. The flow containment structures may include flow containment micro-cavities (FCMCs) and flow containment micro-levee (FCMLs). The FCMLs may be elongated ridges overlying the first surface of the device wafer and extending substantially parallel to the bonding structure. The FCMLs may include interior FCMLs lying within a perimeter of the bonding structure, exterior FCMLs lying outside of the bonding structure perimeter, or both. When the two wafers are bonded, the FCMLs and FCMCs confine flow of the eutectic material to the region of the bonding structure.
13 Citations
20 Claims
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1-14. -14. (canceled)
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15. A micro-electrical mechanical device, comprising:
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a device substrate; a device structure overlying a first surface of the device substrate; a cap substrate, the cap substrate defining a device cavity; a eutectic bond connecting the device substrate and the cap substrate, wherein the eutectic bond circumvents the device structure; and a flow containment micro-levee (FCML) formed on the device substrate, wherein the FCML comprises an elongated ridge in contact with a first surface of the device substrate, the flow containment structure extending substantially parallel to the eutectic bond. - View Dependent Claims (16, 17, 18)
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19. A wafer level assembly comprising:
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a first semiconductor substrate including a device structure wherein the device structure includes moving elements; a second semiconductor substrate including a cavity housing the device structure; a eutectic bond bonding the first semiconductor substrate and the second semiconductor substrate and surrounding the device structure; and a flow containment micro-levee comprising an elongated ridge overlying an upper surface of the first semiconductor substrate extending parallel to the eutectic bond. - View Dependent Claims (20)
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Specification