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METHOD AND APPARATUS FOR UNIVERSAL PROGRAM CONTROLLED BUS ARCHITECTURE

  • US 20110043248A1
  • Filed: 10/29/2010
  • Published: 02/24/2011
  • Est. Priority Date: 09/04/1996
  • Status: Active Grant
First Claim
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1. A programmable integrated circuit device, comprising:

  • first and second megacells of a first plurality of megacells, each of the first and second megacells having a plurality of input/output ports;

    a first line of a first plurality of lines, wherein;

    the first plurality of lines comprises a bus associated with the first plurality of megacells,the first line is programmably coupleable to a first input/output port of the first megacell, andthe first line is programmably coupleable to a second input/output port of the second megacell; and

    a first programmable combinatorial logic element programmably coupleable to the first line.

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