Semiconductor Device having variable parameter selection based on temperature and test method

• US 20110046912A1
• Filed: 06/04/2010
• Published: 02/24/2011
• Est. Priority Date: 04/19/2006
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Intellectual Ventures Holding 83 LLC (Intellectual Ventures LLC)
• Inventors: Walker, Darryl G.
• Granted Patent: US 8,081,532 B2
• Time in Patent Office: Days
• US Class Current: 702/130
• CPC Class Codes: G01K 7/425 Thermal management of integrated systems

Abstract

A semiconductor device that may include temperature sensing circuits is disclosed. The temperature sensing circuits may be used to control various parameters, such as internal regulated supply voltages, internal refresh frequency, or a word line low voltage. In this way, operating specifications of a semiconductor device at worst case temperatures may be met without compromising performance at normal operating temperatures. Each temperature sensing circuit may include a selectable temperature threshold value as well as a selectable temperature hysteresis value. In this way, temperature performance characteristics may be finely tuned. Furthermore, a method of testing the temperature sensing circuits is disclosed in which a current value may be monitored and temperature threshold values and temperature hysteresis values may be thereby determined.

Claims

1. A semiconductor device, comprising:

a first temperature sensing circuit including a first temperature threshold value and providing a first temperature indication signal having a first temperature indication logic level;

a multiplexer having a first multiplexer input coupled to receive the first temperature indication signal and a second multiplexer input coupled to receive a data signal, the multiplexer coupled to receive a temperature read enable signal and provides a first multiplexer output signal; and

an output circuit coupled to receive the first multiplexer output signal and includes a first data output terminal wherein during a temperature read mode, the temperature read enable signal is activated and the first temperature indication logic level is provided to the first data output terminal through the output circuit.

2. The semiconductor device of claim 1, wherein:

the data output terminal provides the first temperature indication logic level externally to the semiconductor device.

3. The semiconductor device of claim 1, wherein:

the first temperature sensing circuit includes a first latch circuit, the first latch circuit is coupled to provide the first temperature indication signal.

4. The semiconductor device of claim 1, further including:

a second temperature sensing circuit including a second temperature threshold value and providing a second temperature indication signal having a second temperature indication logic level, the multiplexer is coupled to receive the second temperature indication signal at a third multiplexer input.

5. The semiconductor device of claim 4, wherein:

the multiplexer includes a second multiplexer output signal and the output circuit is coupled to receive the second multiplexer output signal and includes a second data output terminal and during the temperature read mode, the second temperature indication signal logic level is provided to the second data output terminal through the output circuit.

6. The semiconductor device of claim 4, further including:

the second temperature sensing circuit includes a second latch circuit, the second latch circuit is coupled to provide the second temperature indication signal.

7. The semiconductor device of claim 1, wherein:

the semiconductor device is a semiconductor memory device.

8. The semiconductor device of claim 1, wherein:

the semiconductor device is a dynamic random access memory device.

9. The semiconductor device of claim 8, wherein:

the first temperature indication signal is for determining a self refresh frequency.

10. The semiconductor device of claim 1, wherein:

the first temperature threshold value is programmable.

11. The semiconductor device of claim 1, wherein:

the first temperature sensing circuit includes a first temperature hysteresis value.

12. The semiconductor device of claim 11, further including:

the first temperature hysteresis value is programmable.

13. The semiconductor device of claim 1, further including:

the first temperature indication signal is for determining a power supply voltage.

14. The semiconductor device of claim 13, wherein:

the semiconductor device is a semiconductor memory device and the power supply voltage is a power supply voltage for peripheral circuits.

15. The semiconductor device of claim 1, further including:

a reference generator providing a first reference voltage; and

the first temperature sensing circuit coupled to receive the first reference voltage.

16. The semiconductor device of claim 15, further including:

a voltage generator coupled to receive the first temperature indication signal and provide a power supply voltage having a voltage level dependent on the first temperature indication signal.

17. The semiconductor device of claim 16, wherein:

the reference generator providing a second reference voltage and the voltage generator is coupled to receive the second reference voltage and provides the power supply voltage dependent on the second reference voltage and the first temperature indication signal.

18. The semiconductor device of claim 16, wherein:

the voltage generator is coupled to receive an activation signal for improving the response time of the voltage generator.

19. The semiconductor device of claim 1, wherein:

the first temperature threshold value is selectable by loading at least one temperature select value during a temperature select load operation.

20. The semiconductor device of claim 1, further including:

a negative voltage generator coupled to receive the first temperature indication signal and provide a negative voltage in response to the first temperature indication signal.