THIN FILM TRANSISTOR, DISPLAY DEVICE USING THIN FILM TRANSISTOR, AND PRODUCTION METHOD OF THIN FILM TRANSISTOR

• US 20110049509A1
• Filed: 08/18/2010
• Published: 03/03/2011
• Est. Priority Date: 08/25/2009
• Status: Active Grant

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Takahashi, Kenji, Yaginuma, Seiichiro, Hayashi, Ryo
• Granted Patent: US 8,207,531 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

Provided is a thin film transistor including: a first gate electrode; a first gate insulating layer covering the first gate electrode; a semiconductor layer on the first gate insulating layer; a second gate insulating layer on the semiconductor layer; a second gate electrode on the second gate insulating layer; and a drain electrode and a source electrode electrically connected to the semiconductor layer, in which: the semiconductor layer is an amorphous oxide semiconductor containing at least one of Zn, Ga, In, and Sn; the first gate electrode shields light entering the semiconductor layer from below, and the second gate electrode shields light entering the semiconductor layer from above; and the second gate electrode is electrically connected to the first gate electrode by penetrating the first gate insulating layer and the second gate insulating layer, to thereby shield light entering the semiconductor layer from at least one of sides thereof.

Claims

1. A thin film transistor, comprising:

a first gate electrode;

a first gate insulating layer covering the first gate electrode;

a semiconductor layer disposed on the first gate insulating layer;

a second gate insulating layer disposed on the semiconductor layer;

a second gate electrode disposed on the second gate insulating layer; and

a drain electrode and a source electrode which are electrically connected to the semiconductor layer, wherein;

the semiconductor layer comprises an amorphous oxide semiconductor containing at least one of Zn, Ga, In, and Sn;

the first gate electrode shields light entering the semiconductor layer from below, and the second gate electrode shields light entering the semiconductor layer from above; and

the second gate electrode is electrically connected to the first gate electrode by penetrating the first gate insulating layer and the second gate insulating layer, to thereby shield light entering the semiconductor layer from at least one of sides thereof.

2. The thin film transistor according to claim 1, wherein the semiconductor layer has a band gap which is equal to or larger than 3 eV.

3. The thin film transistor according to claim 1 or 2, wherein, in a region where the second gate electrode is electrically connected to the first gate electrode by penetrating the first gate insulating layer and the second gate insulating layer, the thin film transistor has a width of an orthogonal projection in a direction of a channel length larger than the channel length thereof.

4. The thin film transistor according to claim 1 or 2, wherein, when the drain electrode and the source electrode are in contact with an upper surface of the semiconductor layer and a thickness of the semiconductor layer under the drain electrode and the source electrode is d, a thickness of the semiconductor layer in a region serving as a channel is thinner than d in a range of equal to or larger than 1 nm and equal to or smaller than (d−

10) nm.

5. A display device comprising the thin film transistor according to claim 1 or 2.

6. A method of producing a thin film transistor, comprising:

a first step of forming a first gate electrode on a substrate;

a second step of forming a first gate insulating layer on the first gate electrode;

a third step of forming a semiconductor layer formed of an amorphous oxide semiconductor containing at least one of Zn, Ga, In, and Sn on the first gate insulating layer;

a fourth step of forming a source electrode and a drain electrode on the semiconductor layer;

a fifth step of forming a second gate insulating layer on the semiconductor layer, the source electrode, and the drain electrode; and

a sixth step of forming a second gate electrode on the second gate insulating layer, and electrically connecting the first gate electrode and the second gate electrode to each other.

7. The method of producing a thin film transistor according to claim 6, further comprising performing wet etching on an upper surface of the semiconductor layer.

8. The method of producing a thin film transistor according to claim 7, wherein the wet etching is performed so that, when a thickness of the semiconductor layer is d, the upper surface of the semiconductor layer is etched to a depth in a range of equal to or larger than 1 nm and equal to or smaller than (d−

10) nm.

9. The method of producing a thin film transistor according to any one of claims 6 to 8, further comprising performing heat treatment at a temperature equal to or larger than 200°

C. later than depositing the second gate insulating layer included in the fifth step.