THIN FILM TRANSISTOR MANUFACTURING METHOD, THIN FILM TRANSISTOR, THIN FILM TRANSISTOR SUBSTRATE AND IMAGE DISPLAY APPARATUS, IMAGE DISPLAY APPARATUS AND SEMICONDUCTOR DEVICE

• US 20110050733A1
• Filed: 02/06/2008
• Published: 03/03/2011
• Est. Priority Date: 02/09/2007
• Status: Active Grant

• Current Assignee: Idemitsu Kosan Company Limited
• Original Assignee: Idemitsu Kosan Company Limited
• Inventors: Inoue, Kazuyoshi, Utsuno, Futoshi, Yano, Koki, Kasami, Masashi
• Granted Patent: US 8,642,402 B2
• Time in Patent Office: Days
• US Class Current: 345/690
• CPC Class Codes: C23C 14/086 of zinc, germanium, cadmium, indium, tin, thallium or bismuth
• CPC Class Codes: C23C 14/3414 Metallurgical or chemical aspects of target preparation, e.g. casting, powder metallurgy
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

To provide a method for producing a thin film transistor improved in stability, uniformity, reproducibility, heat resistance, durability or the like, a thin film transistor, a thin film transistor substrate, an image display apparatus, an image display apparatus and a semiconductor device.

In the semiconductor device, a crystalline oxide is used as an N-type transistor and the electron carrier concentration of the crystalline oxide is less than 2×10¹⁷/cm³. Furthermore, the crystalline oxide is a polycrystalline oxide containing In and one or more positive divalent elements selected from Zn, Mg, Cu, Ni, Co and Ca, and the atomic ratio In [In] and the positive divalent element [X][X]/([X]+[In]) is 0.0001 to 0.13.

Claims

1. A method for producing a thin film transistor comprising the steps of:

a film-forming step in which an amorphous oxide film is formed;

a patterning step in which said amorphous oxide film is patterned by etching; and

a crystallization step in which said amorphous oxide film which is patterned in the patterning step is crystallized, wherein said crystallized crystalline oxide film is allowed to be a channel layer.

2. The method for producing a thin film transistor according to claim 1, wherein said crystalline oxide film contains In and a positive divalent element.

3. The method for producing a thin film transistor according to claim 2, wherein said positive divalent element is one or more elements selected from Zn, Mg, Cu, Co, Ni and Ca.

4. The method for producing a thin film transistor according to claim 2, wherein an atomic ratio of said In [In] and said positive divalent element [X][X]/([X]+[In]) is 0.0001≦

[X]/([X]+[In])≦

0.5.

5. The method for producing a thin film transistor according to claim 4, wherein said atomic ratio of the In [In] and the positive divalent element [X][X]/([X]+[In]) is 0.01≦

[X]/([X]+[In])≦

0.1.

6. The method for producing a thin film transistor according to claim 1, wherein any one film forming method selected from a sputtering method, a vapor deposition method, an ion plating method, a CVD method, a spray method and a dipping method is used in said film-forming step.

7. The method for producing a thin film transistor according to claim 1, wherein a sputtering method is used in the film-forming step and said sputtering method is any one selected from a DC magnetron sputtering method, an AC magnetron sputtering method and an RF magnetron sputtering method.

8. The method for producing a thin film transistor according to claim 1, wherein wet etching is used in said patterning step.

9. The method for producing a thin film transistor according to claim 1, wherein, in said crystallization step, said amorphous oxide film is crystallized according to one or more methods selected from a heat treatment, a plasma treatment and a laser irradiation treatment.

10. The method for producing a thin film transistor according to claim 1, wherein said crystalline oxide film is subjected to an oxidization step in said crystallization step or after said crystallization treatment.

11. The method for producing a thin film transistor according to claim 10, wherein said oxidization treatment is performed by one or more treatment methods selected from a heat treatment in the presence of oxygen, an ozone treatment and a plasma treatment.

12. The method for producing a thin film transistor according to claim 1, wherein a sputtering method is used in the film-forming step to form said amorphous oxide at a temperature lower than 150°

C., patterning is performed in said patterning step with an etching solution containing oxalic acid, and a heat treatment is performed in the presence of oxygen at a temperature of 150 to 500°

C. in said crystallization step.

13. The method for producing a thin film transistor according to claim 7, wherein water or hydrogen is contained in an atmospheric gas in said sputtering method.

14. A method for producing a thin film transistor according to claim 1, wherein a thin film is formed on said crystalline oxide film after said crystallization step, and said thin film is patterned by wet etching.

15. A method for producing a thin film transistor according to claim 8, wherein said wet etching is performed by using an etching solution containing one or more acids selected from oxalic acid, hydrochloric acid and phosphoric acid.

16. A thin film transistor which is produced by the method for producing a thin film transistor according to claim 1.

17. A thin film transistor substrate wherein a plurality of thin film transistor according to claim 16 is arranged on a substrate or a sheet-like base.

18. An image display apparatus wherein the thin film transistor according to claim 16 is used.

38. The method for producing a thin film transistor according to claim 12, wherein water or hydrogen is contained in an atmospheric gas in said sputtering method.

39. A method for producing a thin film transistor according to claim 14, wherein said wet etching is performed by using an etching solution containing one or more acids selected from oxalic acid, hydrochloric acid and phosphoric acid.

19. An active matrix type image display apparatus provided with a light control element and a field-effect type transistor for driving said light control element, wherein an active layer of said field-effect type transistor is a crystalline oxide and the electron carrier concentration of said active layer is less than 2×

10¹⁷/cm³.

20. The image display apparatus according to claim 19, wherein said crystalline oxide contains In and a positive divalent element.

21. The image display apparatus according to claim 19, wherein said crystalline oxide is a polycrystalline oxide containing In and one or more positive divalent elements selected from Zn, Mg, Cu, Ni, Co and Ca, and an atomic ratio of said In [In] and said positive divalent element [X][X]/([X]+[In]) is 0.0001 to 0.13.

22. The image display apparatus according to claim 19, wherein said crystalline oxide has resistance to PAN.

23. The image display apparatus according to claim 19, wherein the electron mobility relative to the electron carrier concentration of said crystalline oxide logarithmically proportionally increases in a predetermined range with an increase in said electron carrier concentration.

24. The image display apparatus according to claim 19, wherein the concentration of Li and Na in said crystalline oxide are 1000 ppm or less.

25. The image display apparatus according to claim 19, wherein said light control element is a liquid crystal element or an electroluminescence element.

26. A semiconductor device using a crystalline oxide as an N-type semiconductor, wherein the electron carrier concentration of said crystalline oxide is less than 2×

10¹⁷/cm³.

27. The semiconductor device according to claim 26, wherein said crystalline oxide contains In and a positive divalent element.

28. The semiconductor device according to claim 26, wherein said crystalline oxide is a polycrystalline oxide containing In and one or more positive divalent element selected from Zn, Mg, Cu, Ni, Co and Ca, wherein an atomic ratio of said In [In] and said positive divalent element [X][X]/([X]+[In]) is 0.0001 to 0.13.

29. The semiconductor device according to claim 28, wherein the electron mobility relative to the electron carrier concentration of said crystalline oxide logarithmically proportionally increases by at least changing the atomic ratio of said In [In] and said positive divalent element [X].

30. The semiconductor device according to claim 26, wherein said crystalline oxide has resistance to PAN.

31. The semiconductor device according to claim 26, wherein the concentration of Li and Na is 1000 ppm or less.

32. The semiconductor device according to claim 26, wherein said semiconductor device is a thin film transistor and said crystalline oxide is used as a channel layer.

33. The semiconductor device according to claim 26, wherein said semiconductor device is provided with a P-type region and an N-type region and said crystalline oxide is used in said N-type region.

34. The semiconductor device according to claim 33, wherein said semiconductor device is a PN junction type transistor.

35. The semiconductor device according to claim 26, wherein said semiconductor device is a static induction transistor, a Schottky barrier transistor, a Schottky diode or a resistive element, and said crystalline oxide is used as an electron conductor.

36. The semiconductor device according to claim 26, wherein said semiconductor device is an integrated circuit and contains an N-type thin film transistor using said crystalline oxide.

37. The semiconductor device according to claim 26, wherein said semiconductor device is provided with a first region composed of said crystalline oxide and a second region forming a hetero junction for said first region.