Series Current Limiter Device

• US 20110051305A1
• Filed: 05/03/2010
• Published: 03/03/2011
• Est. Priority Date: 09/26/2007
• Status: Active Grant

• Current Assignee: STMicroelectronics International N.V. (STMicroelectronics NV)
• Original Assignee: Lakota Technologies, Inc. (2-Infinity, Inc.), STMicroelectronics NV
• Inventors: Ankoudinov, Alexei, Rodov, Vladimir, Blanchard, Richard A.
• Granted Patent: US 8,643,055 B2
• Time in Patent Office: Days
• US Class Current: 361/111
• CPC Class Codes: H01L 27/088 the components being field-effect transistors with insulated gate
• CPC Class Codes: H01L 29/423 not carrying the current to be rectified, amplified or switched
• CPC Class Codes: H01L 29/7803 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7815 with voltage or current sensing structure, e.g. emulator section, overcurrent sensing cell
• CPC Class Codes: H01L 29/861 Diodes
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Semiconductor protection devices, and related methods and systems, especially devices for providing series current limiting. The device typically comprises two regenerative building blocks and/or MOSFETs connected back-to-back in series, where one of the MOSFETs/Regenerative Building Blocks has an extra voltage probe electrode that provides a regenerative signal with self-limited voltage to the other via coupling to its gate electrode.

Claims

1. A transient current blocking unit, comprising:

a pair of self-bootstrapping diodes connected together in series with opposed polarities;

wherein each said diode is optimized for a maximum current density, under reverse bias, which is more than ten times the maximum current density which would occur in said diode if optimized for rectification.

2. The unit of claim 1, wherein each said diode also has a leakage current density, under reverse bias, which is more than ten times that which would be present if the diode were optimized for rectification.

3. The unit of claim 1, wherein each said diode includes:

a first field-effect transistor structure, having a first semiconductor channel which electrically separates a first semiconductor source of a first conductivity type from a first drift region, and which is gated by a first gate electrode;

said first drift region supplying first-type majority carriers both to a first drain structure, and also to a first probe node which is electrically separate from said first drain structure; and

a second field-effect transistor structure, having a second semiconductor channel which electrically separates a second semiconductor source of a second conductivity type from a second drift region, and which is gated by a second gate electrode;

said second drift region supplying second-type majority carriers at least to a second drain structure;

wherein said second gate electrode is connected to said first probe node, and said first gate electrode is connected to be driven by said second drift region;

said first and second sources being electrically connected together.

4. A transient current blocking unit, comprising:

a pair of diodes connected together in series with opposed polarities;

at least one of said diodes comprising a semiconductor device which includes;

a first semiconductor channel which electrically separates a first semiconductor source of a first conductivity type from a first drift region, and which is gated by a first gate electrode;

a second semiconductor channel which electrically separates a second semiconductor source of a second conductivity type from a second drift region, and which is gated by a second gate electrode;

said first and second sources being electrically connected together;

a first external terminal, which is operatively connected to receive first-type majority carriers through said first drift region, and a second external terminal, which is operatively connected to receive second-type majority carriers through said second drift region;

said first gate electrode being operatively connected to receive a potential which is dependent on the potential of said second drift region, and said second gate electrode being operatively connected to receive a potential which is dependent on the potential of said first drift region;

wherein each said diode has a maximum current density, under reverse bias, which is more than ten times the maximum current density which would occur in said diode if optimized for rectification.

5. The unit of claim 4, wherein said first gate electrode is connected to said second external terminal.

6. The unit of claim 4, wherein said first conductivity type is n-type, and said first-type majority carriers are electrons.

7. The unit of claim 4, wherein said first gate electrode is connected to said second external terminal, and said second gate electrode is connected to said first external terminal.

8. The unit of claim 4, wherein said second gate electrode is connected to a first probe node which is fed by said first drift region, and wherein said first probe node is not itself connected to said first external terminal.

9. The unit of claim 4, wherein said second gate electrode is connected to a first probe node which is fed by said first drift region, and wherein said first probe node is not itself connected to said first external terminal;

and wherein said first gate electrode is connected to a second probe node which is fed by said second drift region, and wherein said second probe node is not directly connected to said second external terminal.

10. The unit of claim 4, wherein said first and second gate electrodes have different respective work function values.

11. The unit of claim 4, wherein said first and second gate electrodes are made from polycrystalline semiconductor materials with opposite respective doping types.

12. The unit of claim 4, wherein said first and second channels both have a lateral-DMOS configuration.

13. The unit of claim 4, wherein said second drift region is substantially lateral, and said first drift region extends vertically downward to a backside drain connection structure.

14. The unit of claim 4, wherein said first and second gate electrodes are each insulated from said respective channels.

15. The unit of claim 4, wherein each said diode also has a leakage current density, under reverse bias, which is more than ten times that which would be present if the diode were optimized for rectification.

16. A method for limiting transient current between two terminals, comprising the actions of:

connecting a pair of diodes in series between said terminals, said diodes being connected with opposed polarities; and

when a cathode terminal of either said diode is more negative than an anode terminal thereof, then sinking current from said anode terminal through a first drift region and a first field-effect-gated channel to an n-type source, and also sourcing current to said cathode terminal from a p-type source through a second field-effect-gated channel and a second drift region;

said n-type and p-type sources being electrically connected together;

said second channel being gated by a second gate electrode which is coupled to said first drift region; and

said first channel being gated by a first gate electrode which is coupled to said second drift region;

wherein each said diode is optimized for a maximum current density, under reverse bias, which is more than ten times the maximum current density which would occur in said diode if optimized for rectification.

17. The method of claim 16, wherein each said diode also has a leakage current density, under reverse bias, which is more than ten times that which would be present if the diode were optimized for rectification.

18. The method of claim 16, wherein at least one said diode has a maximum current density, under reverse bias, which is more than ten Amperes per square centimeter.

19. The method of claim 16, wherein each said diode also has a maximum current density, under reverse bias, which is more than one hundred times that which would be present if the diode were optimized for rectification.

20. The method of claim 16, wherein each said diode also has a leakage current density, under reverse bias, which is more than ten times that which would be present if the diode were optimized for rectification, and has a maximum current density, under reverse bias, which is more than ten times the maximum current density which would occur in said diode if optimized for rectification.